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IRAUDAMP6 REV 1
.0
Selectable Dead-time
The IRS20957 determines its dead-time based on the voltage applied to the DT pin. An internal
comparator translates which pre-determined dead-time is being used by comparing the DT voltage
with internal reference voltages. A resistive voltage divider from V
CC
sets threshold voltages for
each setting, negating the need for a precise absolute voltage to set the mode. The threshold
voltages between dead-time settings are set internally, based on different ratios of V
CC
as
indicated in the diagram below. In order to avoid drift from the input bias current of the DT pin, a
bias current of greater than 0.5 mA is suggested for the external resistor divider circuit. Suggested
values of resistance that are used to set a dead-time are given below. Resistors with up to 5%
tolerance can be used.
Dead-time mode Dead-time R22 R19 DT Voltage
DT1 ~15 ns
<10k
Ω
Open V
CC
DT2 ~25 ns
5.6k
Ω
4.7k
Ω
0.46(V
CC
)
DT3 ~35 ns
8.2k
Ω
3.3k
Ω
0.29(V
CC
)
DT4 ~45 ns Open
<10k
Ω
COM
Recommended Resistor Values for Dead Time Selection
Vcc 0.57 xVcc 0.36 xVcc 0.23 xVcc
45 nS
35nS
25nS
15nS
V
DT
Dead- time
Fig 17 Dead-time Settings vs. V
DT
Voltage
Level Shifters
The internal input level-shifter transfers the PWM signal down to the low-side gate driver section.
The gate driver section has another level-shifter that level shifts up the high-side gate signal to the
high-side gate driver section.