4
AN1288.1
October 30, 2008
Start-up
The ISL8105B starts up when V
BIAS
rises above POR
threshold and the COMP/EN rises above V
DISABLE
level. The
entire start-up time sequence from POR typically takes up to
23.8ms; up to 10.2ms for the delay and the Overcurrent
Protection (OCP) sample and hold operation. The initial delay
is added to allow the bias voltage to rise/exceed 6.5V, so that
the internal bias regulator can turn on cleanly. When the OCP
sampling and hold operations are done, the soft-start function
internally ramps the reference on the non-inverting terminal of
the error amp from 0V to 0.6V in 13.6ms (typ).
Figure 3 shows the start-up profile of the ISL8105BEVAL1Z,
ISL8105BEVAL2Z in relation to the start-up of the 12V input
supply and the bias supply.
Soft-Start with Pre-Biased Output
If the output is pre-biased to a voltage less than the expected
value, the ISL8105BEVAL1Z, ISL8105BEVAL2Z will detect
that condition. Neither MOSFETs will turn on until the
soft-start ramp voltage exceeds the FB voltage; V
OUT
starts
seamlessly ramping from there.
Output Ripple
Figure 5 shows the ripple voltage on the output of the
regulator.
Verifying Loop Gain
Figure 6 shows the measurement of loop gain of the
converter with feedback network design in the previous
sections.
FIGURE 3. SOFT-START
V
IN
= 12V, V
OUT
= 1.8V, I
OUT
= 15A
COMP
VOUT
IL
LX
FIGURE 4. SOFT-START WITH PRE-BIASED OUTPUT
V
IN
= 12V, V
OUT
= 1.8V, I
OUT
= 1A
Vout
COMP
Lx
FIGURE 5. OUTPUT RIPPLE (20MHz BW)
FIGURE 6. LOOP GAIN MEASUREMENT AT +25°C
Application Note 1288