Intersil ISL6423B Скачать руководство пользователя страница 2

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October 27, 2010

AN1582.0

7. Jumpers JP1, JP2, and JP3 are inserted, whereas JP4 

is open, which provides a logic high signal to the 
SELVTOP pin for controlling the output voltage. 
Consult the 

ISL6423

ISL6423B

 data sheets for 

additional information. 

8. Click on Open Device and the ‘USB Attach’ and ‘USB 

Device Handle’ buttons in the top left should turn 
green.

9. To enable the ISL6423, ISL6423B, toggle the EN bit 

on System Register 4 to ‘1’, at which point the 
evaluation board should read approximately 13.3V 
between VLNB and GND post.

10.For additional programming features on the 

ISL6423, ISL6423B evaluation board, please 
consult the 

ISL6423

ISL6423B

 data sheets under 

I

2

C register settings.

11.For accurate noise and tone measurement, please 

insert the scope probe in the SP1 connector on the 
evaluation board. Figure 4 shows the ISL6423, 
ISL6423B tone at 500mA of resistive load current 
from 12V

IN

 when the output voltage is programmed 

for 13.3V.

FIGURE 3.

Application Note 1582

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