Intel SASMF8I - RAID Controller, Руководство пользователя по оборудованию

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Intel® RAID Controller SASMF8I Hardware User’s Guide 3
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Auto-resume of initialization or rebuild on reboot (the auto rebuild feature must be
enabled before virtual disk creation).
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Smart initialization automatically checks consistency of virtual disks if there are five
or more disks in a RAID 5 array, which optimizes performance by enabling read-
modify-write mode. RAID 5 arrays of only three or overdrives use peer read mode.
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Smart Technology predicts failures of drives and electronic components.
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Commands are retried at least four times.
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Firmware provides best effort to recognize an error and recover from it if possible.
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Failures are logged from controller and drive firmware, SMART monitor, and SAF-
TE controller.
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Failures are logged in Intel
®
RAID Web Console 2 or CIM, and can be viewed from
LEDs.
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Multiple cache options provide choice of speed and redundancy:
— Disk Write Cache: The data written / (done) signal is returned when data is
written to the drive or only to the drive’s cache.
✧
On (default): Write back mode enabled. Faster, because it does not wait for
the disk, but data will be lost if power is lost.
✧
Off: Write-through mode enabled. Slower, but ensures data is on the disk.
— Read Ahead: Predicts the next read will be sequential and buffers this data into
the drive’s cache.
✧
On: Read Ahead mode enabled. Faster in data sequential read mode but
slower in data random read mode.
✧
Off: Non-Read Ahead mode enabled. Always reads from the drive after
determining the exact location of each read.
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Redundancy through:
— Configuration stored in non-volatile RAM and on the drives (COD).
— Hot-swap support.
SAS and SATA Features
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Provides eight independent PHYs, each supporting 3.0 Gbps and 1.5 Gbps SAS and
SATA data transfers.
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Scalable interface that supports up to eight direct-attached SAS/SATA devices or
eight logical devices.
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Transfers data using SCSI information units.
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Supports SSP to enable communication with other SAS devices.
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Supports SMP to communicate topology management information.
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Supports single PHY or wide ports consisting of two, three, or four PHYs within a
single quad port.