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ICH8/ICH9—NVM Information Guide

1.0

Non-Volatile Memory (NVM)

1.1

Introduction

The document is intended for designs using the 10/100/1000 Mb/s LAN controller that

is integrated into the Intel

I/O Control Hub 8 or I/O Control Hub 9 (ICH8/ICH9)

device.

The Non-Volatile Memory (NVM) space is used for hardware and software configuration.

It is read by software to determine and configure specific design features.

Unless otherwise specified, all numbers in this document use the following numbering

convention:

• Numbers that do not have a suffix are decimal (base 10).
• Numbers with a suffix of “h” are hexadecimal (base 16).
• Numbers with a suffix of “b” are binary (base 2).

1.2

NVM Programming Procedure Overview

The LAN NVM shares space on an SPI Flash device (or devices) along with the BIOS,

Manageability Firmware, and a Flash Descriptor Region. It is programmed through the

ICH8/ICH9. This combined image is shown in

Figure 1

. The Flash Descriptor Region is

used to define vendor specific information and the location, allocated space, and read

and write permissions for each region. The Manageability (ME) Region contains the

code and configuration data for ME functions such as Intel

Active Management

Technology, ASF, and Advanced Fan Speed Control. The system BIOS is contained in

the BIOS Region. The ME Region and BIOS Region are beyond the scope of this

document and a more detailed explanation of these areas can be found in the

Intel

O Controller Hub 8 (ICH8) Family External Design Specification (ICH8 EDS)

and the

Intel

I/O Controller Hub 9 (ICH9) Family External Design Specification (ICH9 EDS)

This document describes the LAN image contained in the Gigabit Ethernet (GbE) region.

Fast Ethernet (

82562V

) images are also described.

Содержание ICH8 - MECHANICAL

Страница 1: ...Revision 2 6 Intel I O Controller Hub 8 9 LAN NVM Map and Information Guide April 2012...

Страница 2: ...N WHETHER OR NOT INTEL OR ITS SUBCONTRACTOR WAS NEGLIGENT IN THE DESIGN MANUFACTURE OR WARNING OF THE INTEL PRODUCT OR ANY OF ITS PARTS Intel may make changes to specifications and product description...

Страница 3: ...ement Word 17h 16 1 4 18 LED 0 and 2 Configuration Defaults Word 18h 18 1 4 19 Future Initialization Word 1 Words 19h 18 1 4 20 Future Init Word 2 Word 1Ah 19 1 4 21 82567MM Device ID Word 1Eh 19 1 4...

Страница 4: ...rd Offset 19h description to Tables 1 and 17 Added new EEPROM images to Appendix A Updated bit defaults and descriptions to Tables 9 10 13 15 and 16 1 75 April 2006 Updated bit descriptions for words...

Страница 5: ...along with the BIOS Manageability Firmware and a Flash Descriptor Region It is programmed through the ICH8 ICH9 This combined image is shown in Figure 1 The Flash Descriptor Region is used to define v...

Страница 6: ...re are two sets of VSCC registers the upper UVSCC and lower LVSCC Note that the LVSCC register is only used if the NVM attributes change For example the use of a second flash component a change in era...

Страница 7: ...the IA address of the LAN controller In addition it also corrects the GbE component checksum field after the region is modified FTOOL does not have this ability For more information on how to use EEU...

Страница 8: ...SW FFFFh 05h 0A Image Version Information 1 SW 06h 0Ch Reserved SW FFFFh 07h 0Eh Reserved SW FFFFh 08h 10h PBA Low SW 09h 12h PBA High SW 0Ah 14h PCI Initialization Control Word HW PCI 0Bh 16h Subsyst...

Страница 9: ...eive Address Register 0 RAL0 RAH0 The Intel default is listed in Table 2 Note The Ethernet IA is byte swapped as listed in Table 2 The IA bytes read from the NVM are used by the ICH8 ICH9 until an IA...

Страница 10: ...4h Bit Name Default Description 15 12 Reserved Word 03h 0000b These bits are reserved and should be set to 0000b 11 IBA LOM 1b Must be set to 1b for Intel Boot Agent IBA to function correctly 10 0 Res...

Страница 11: ...junction with the PM Enable bit 0b D3cold wake up is not advertised 1b D3cold wake up is advertised in the PMC register of the PCI function if the PM Enable bit is also set 6 PM Enable 1b This bit ena...

Страница 12: ...ntel Platform LAN Connects Device ID Adapter 1049h Intel 82566MM Gigabit Ethernet Controller 104Ah Intel 82566DM Gigabit Ethernet Controller 104Bh Intel 82566DC Gigabit Ethernet Controller 104Ch Intel...

Страница 13: ...lization Control Word 13h Bit Name Default Description 15 14 SIGN 10b This is a 2 bit field indicating whether a valid NVM is present to the MAC If this field does not equal 10b the MAC does not read...

Страница 14: ...b Note This is a reserved bit for the 82566 and 82562V 4 3 FD 0b Duplex Setting Default setting for duplex setting Mapped to CTRL 0 The hardware default value is 1b Note This is a reserved bit for the...

Страница 15: ...d bit 13 PHY Write Enable 1b This bit loads the extended PHY configuration area in the MAC It is loaded to the EXTCNF_CTRL register 0b Extended PHY configuration area is ignored 1b Enables the PHY con...

Страница 16: ...wer states including D0a 13 12 Reserved 00b These bits are reserved and should be set to 000b 11 GbE Disable in non D0a 1b For ICH9 this bit disables GbE operation in non D0a states This bit must be s...

Страница 17: ...3 0 Selected Mode Source Indication 0000b LINK_10 1000 Asserted when either 10 Mb s or 1000 Mb s link is established and maintained 0001b LINK_100 1000 Asserted when either 100 Mb s or 1000 Mb s link...

Страница 18: ...tial value of the LED2_MODE field which specifies the event state or pattern displayed on LED2 LINK_100 output A value of 0110b causes this to indicate 100 Mb s operation 7 LED0 Blink 1b This bit indi...

Страница 19: ...is also loaded to the FEXTNVM register bit 16 however the bit in the FEXTNVM does not impact the device functionality 15 1 Reserved 00h Reserved Bit Name Default Description 15 0 Reserved 0800h Reserv...

Страница 20: ...ault for this bit is 0b for backwards compatibility with existing systems already in the field If this bit is set to 0b EEPROM word 32h PXE Version is valid When EPB is set to 1b and this bit is set t...

Страница 21: ...oes not appear if 0 seconds prompt time is selected 5 Reserved Reserved 4 3 DBS Default Boot Selection These bits select which device is the default boot device These bits are only used if the agent d...

Страница 22: ...Expansion ROM supports in the BIOS and assumes the BIOS is not compliant The BIOS boot order can be changed in the Setup Menu 010b Force BBS mode The agent assumes the BIOS is BBS compliant even thou...

Страница 23: ...is 0b allow changes to the boot protocol 1 DTM Disable Title Message If set to 1b the title message displaying the version of the boot agent is suppressed the Control S message is also suppressed Thi...

Страница 24: ...he image Note The default image always has a checksum value of 0 The default image always has a checksum value of 0b The LAD programming tools EEUPDATE or LANCONF update the checksum when the image is...

Страница 25: ...s an internal initialization loop Word Address relative to base address Used By 15 8 7 0 00h 01h HW PHY Extended Configuration Dword 0 HW 2 N 1 h 2N 1 h HW PHY Extended Configuration Dword N 1 1 1 N n...

Страница 26: ...iguration listed in Table 22 1 5 3 Undock Extended Configuration Words 2N 2L h 2N 4L 1 h From Base There are L valid Dwords in this range where L number of Undock Dwords as determined in the Extended...

Страница 27: ...h Subsystem Vendor ID 0Dh Device ID 0Eh Vendor ID 0Fh Device Revision ID ICH9 Reserved ICH8 10h LAN Power Consumption 11 12h Reserved 13h Shared Initialization Control Word 14 16h Extended Configurati...

Страница 28: ...NVM Information Guide ICH8 ICH9 28 Note This page intentionally left blank...

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