Intel EMB-H61A, Руководство пользователя

Страница: 68 / 91

I n d u s t r i al M o t he r b o ar d E M B - H6 1 A
Appendix A Programming the Watchdog Timer A-2
A.1 Watchdog Timer Initial Program
Table 1 : SuperIO relative register table
Default Value Note
Index 0x2E
(Note1)
SIO MB PnP Mode Index Register
0x2E or 0x4E
Data 0x2F
(Note2)
SIO MB PnP Mode Data Register
0x2F or 0x4F
Table 2 : Watchdog relative register table
LDN Register BitNum Value Note
Timer
Counter
0x07
(Note3)
0xF6
(Note4) (Note24)
Time of watchdog
timer
(0~255)
This register is byte
access
Counting
Unit
0x07
(Note5)
0xF5
(Note6)
3
(Note7)
0
(Note8)
Select time unit.
0: second
1: minute
Watchdog
Enable
0x07
(Note9)
0xF5
(Note10)
5
(Note11)
1
(Note12)
0: Disable
1: Enable
Timeout
Status
0x07
(Note13)
0xF5
(Note14)
6
(Note15)
1
1: Clear timeout
status
Output
Mode
0x07
(Note16)
0xF5
(Note17)
4
(Note18)
1
(Note19)
Select WDTRST#
output mode
0: level
1: pulse
WDTRST
output
0x07
(Note20)
0xFA
(Note21)
0
(Note22)
1
(Note23)
Enable/Disable
time out output via
WDTRST#
0: Disable
1: Enable