Intel D810E2CA3, Спецификация

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Technical Reference
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Table 14. I/O Map (continued)
Address (hex) Size Description
64 contiguous bytes starting on a 64-byte divisible boundary D810E2CA3 Board resource
256 contiguous bytes starting on a 256-byte divisible
boundary AC ’97 audio mixer
64 contiguous bytes starting on a 64-byte divisible boundary ICH2 LAN controller
256 contiguous bytes starting on a 256-byte divisible
boundary AC ‘97 modem mixer
64 contiguous bytes starting on a 64-byte divisible boundary AC ‘97 audio mixer
32 contiguous bytes starting on a 32-byte divisible boundary ICH2 (USB controller #1)
32 contiguous bytes starting on a 32-byte divisible boundary ICH2 (USB controller #2)
16 contiguous bytes starting on a 16-byte divisible boundary ICH2 (SMB)
4096 contiguous bytes starting on a 4096-byte divisible
boundary Intel 82801BA PCI bridge
64 contiguous bytes starting on a 64-byte divisible boundary Intel 82562ET LAN controller (optional)
Notes:
1. Default, but can be changed to another address range.
2. Dword access only
3. Byte access only
✏
NOTE
Some additional I/O addresses are not available due to ICH2 address aliassing.
For information about Refer to
ICH2 addressing Section 1.2, page 16
2.4 DMA Channels
Table 15. DMA Channels
DMA Channel Number Data Width System Resource
0 8 or 16 bits Open
1 8 or 16 bits Parallel port
2 8 or 16 bits Diskette drive
3 8 or 16 bits Parallel port (for ECP or EPP)
4 DMA controller
5 16 bits Open
6 16 bits Open
7 16 bits Open