Intel 8x931HA, Информационный лист предварительных данных

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A A
B B
C C
D D
E E
4
4
3
3
2
2
1
1
Intel assumes no responsibility for any errors which may appear in the design. Intel reserves the right to modify this design without notice.
DOWNSTREAM DOWNSTREAM
Self Bus
Power Input Pin and Barrel
UPSTREAM
PORT-0
3.3 V Pullup
Power Mode
PORT-2
PORT-3 PORT-5
PORT-4
Full speed
D
Intel Corporation
1
Thursday, January 22, 1998
2
2
B
CEG System Engineering Boards and ASICs 5000 W. Chandler Blvd. Chandler, AZ 85226
8x931 USB CHU
B
PORTS
CMJ
Size Drawn by
CAGE Code
DWG NO
Rev
Sheet
of
Date
PORTVCC5 PORTVCC2 PORTVCC3
P5VSWIN
PORTVCC4
GNDEXT
OVRI_NOT
P5VEXT
P5VUPSTR
DP3 DM5 DM3 DP5 DM4 DP4 DP2 DM2
DP0
OVRI_NOT
UPWEN_NOT
ECAP
PWR_MODE
DM0
P5V
VCC
VDD
GND
P5V
DGND
P5V DGND P5V
DGND DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
C4 10uF
1 2
C14 0.1uF
1 2
+
C17 100 uF
1 2
+
C15 100 uF
1 2
J4
USB_A_Stacked
B1 B2 B3 B4
T1 T2 T3 T4
R1 1.5k ohm
1 2
J2
USB_A_Stacked
B1 B2 B3 B4
T1 T2 T3 T4
U4 MIC2526-2
ENA
1
FLGA
2
FLGB
3
ENB
4
OUTB
5
GND
6
IN
7
OUTA
8
R2 470k ohm
1 2
U5 MIC2526-2
ENA
1
FLGA
2
FLGB
3
ENB
4
OUTB
5
GND
6
IN
7
OUTA
8
J1 CON2
1 2
J3 USB_B
1 2 3 4
+
C12 100 uF
1 2
+
C16 100 uF
1 2
S1 SW DPDT
2
1 3
5
4 6
FB21 BLM21P300S
1
2
FB18 BLM21B201S
1
2
FB20 BLM21P300S
1
2
FB16 BLM21B201S
1
2
FB10 BLM21B201S
1
2
FB11 BLM21B201S
1
2
FB17 BLM21B201S
1
2
FB15 BLM21B201S
1
2
FB8 BLM21B201S
1
2
FB6
BLM21B201S
1
2
FB5 BLM21B201S
1
2
FB4 BLM21B201S
1
2
FB22 BLM21P300S
1
2
FB19 BLM21P300S
1
2
FB3 BLM21P300S
1
2
FB2 BLM21P300S
1
2
FB13 BLM21P300S
1
2
FB14 BLM21P300S
1
2
FB9 BLM21P300S
1
2
FB12 BLM21P300S
1
2
FB7 BLM21P300S
1
2
FB1 BLM21P300S
1
2