Intel® ICH SATA Controller Basic Attributes
R
SATA Programmer’s Reference Manual
11
3 Intel
®
ICH SATA Controller Basic
Attributes
The register set for the ICH5 SATA controller is basically identical to that of the integrated
parallel ATA controller. Because the underlying SATA functionality is transparent to operating
system software, it need not have any special knowledge about SATA or SATA devices. In
addition to supporting the same programming interface, the SATA host controller can also be
configured to use legacy ATA resources as well as native PCI resources.
3.1 Legacy
Sub-Mode
A host controller (channel) configured for legacy sub-mode of operation has the following
requirements:
•
Has its Programming Interface register set for legacy mode
•
Shall interrupt via IRQ14 (primary channel) and IRQ15 (secondary channel)
•
Command and control block are accessed at fixed I/O locations:
Command Block Offset:
01F0h for primary and 0170h for secondary
Control Block Offset
: 03F4h for primary and 0374h for secondary
3.2 Native
Sub-Mode
A host controller (channel) configured for native sub-mode of operation has the following
requirements:
•
Has its Programming Interface register set for native mode.
•
Shall interrupt via the INTA#.
•
Command and control blocks are accessed via I/O space specified by the following BARs
located by the following PCI configuration offsets:
Offset 10h – Primary Command Block Base Address
Offset 14h – Primary Control Block Base Address
Offset 18h – Secondary Command Block Base Address
Offset 1Ch – Secondary Control Block Base Address
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