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AUTOMOTIVE 80C51FA/83C51FA

PIN DESCRIPTIONS

V

CC

:

Supply voltage.

V

SS

:

Circuit ground.

Port 0

:

Port 0 is an 8-bit, open drain, bidirectional

I/O port. As an output port each pin can sink several

LS TTL inputs. Port 0 pins that have 1's written to

them float, and in that state can be used as high-im-

pedance inputs.

Port 0 is also the multiplexed low-order address and

data bus during accesses to external Program and

Data Memory. In this application it uses strong inter-

nal pullups when emitting1's, and can source and

sink several LS TTL inputs.

Port 0 outputs the code bytes during program verifi-

cation. External pullup resistors are required during

program verification.

Port 1

:

Port 1 is an 8-bit bidirectional I/O port with

internal pullups. The Port 1 output buffers can drive

LS TTL inputs. Port 1 pins that have 1's written to

them are pulled high by the internal pullups, and in

that state can be used as inputs. As inputs, Port 1

pins that are externally pulled low will source current

(I

IL

, on the datasheet) because of the internal pull-

ups.

In addition, Port 1 serves the functions of the follow-

ing special features of the 83C51FA:

Port Pin

Alternate Function

P1.0

T2 (External Count Input to Timer/

Counter 2)

P1.1

T2EX (Timer/Counter 2 Capture/

Reload Trigger and Direction Control)

P1.2

ECI (External Count Input to the PCA)

P1.3

CEX0 (External I/O for Compare/

Capture Module 0)

P1.4

CEX1 (External I/O for Compare/

Capture Module 1)

P1.5

CEX2 (External I/O for Compare/

Capture Module 2)

P1.6

CEX3 (External I/O for Compare/

Capture Module 3)

P1.7

CEX4 (External I/O for Compare/

Capture Module 4)

Port 2

:

Port 2 is an 8-bit bidirectional I/O port with

internal pullups. The Port 2 output buffers can drive

LS TTL inputs. Port 2 pins that have 1's written to

them are pulled high by the internal pullups, and in

that state can be used as inputs. As inputs, Port 2

pins that are externally pulled low will source current

(I

IL

, on the datasheet) because of the internal pull-

ups.

Port 2 emits the high-order address byte during

fetches from external Program Memory and during

accesses to external Data Memory that use 16-bit

addresses (MOVX

@

DPTR). In this application it

uses strong internal pullups when emitting 1's. Dur-

ing accesses to external Data Memory that use 8-bit

Pin (PDIP)

270501±3

Pad (PLCC)

270501±4

**

Do not connect reserved pins.

Diagrams are for pin reference only. Package sizes are not to scale.

Figure 3. Pin Connections

4

Содержание 80C51FA

Страница 1: ...Power Down Modes Y ONCE On Circuit Emulation Mode Y Available in PLCC and PDIP Packages See Packaging Specification Order 231369 Y Available in 12 MHz and 16 MHz Versions MEMORY ORGANIZATION PROGRAM M...

Страница 2: ...AUTOMOTIVE 80C51FA 83C51FA 270501 1 Figure 1 83C51FA Block Diagram 2...

Страница 3: ...are guaranteed over the temperature range of 40 C to 85 C ambient For the automo tive temperature range option operational charac teristics are guaranteed over the temperature range of 40 C to 125 C...

Страница 4: ...l features of the 83C51FA Port Pin Alternate Function P1 0 T2 External Count Input to Timer Counter 2 P1 1 T2EX Timer Counter 2 Capture Reload Trigger and Direction Control P1 2 ECI External Count Inp...

Страница 5: ...ead strobe to external Program Memory When the 83C51FA is executing code from external Program Memory PSEN is activated twice each ma chine cycle except that two PSEN activations are skipped during ea...

Страница 6: ...is serviced the next instruction to be executed after RETI will be the one following the instruction that put the device into Power Down DESIGN CONSIDERATION When the Idle mode is terminated by a har...

Страница 7: ...is not recommended and ex tended exposure beyond the Operating Conditions may affect device reliability DC CHARACTERISTICS TA e b40 C to a125 C VCC e 5V g10 VSS e 0V Symbol Parameter Min Typ Max Unit...

Страница 8: ...pFs the noise pulse on the ALE signal may exceed 0 8V In these cases it may be desirable to qualify ALE with a Schmitt Trigger or use an Address Latch with a Schmitt Trigger Strobe input 2 Capacitive...

Страница 9: ...s Frequency 270501 8 TCLCH e TCHCL e 5 ns Figure 7 ICC Test Condition Active Mode All other pins disconnected 270501 9 TCLCH e TCHCL e 5 ns Figure 8 ICC Test Condition Idle Mode All other pins disconn...

Страница 10: ...h 127 2TCLCLb40 ns TAVLL Address Valid to ALE Low 43 TCLCLb40 ns TLLAX Address Hold After ALE Low 53 TCLCLb30 ns TLLIV ALE Low to Valid Instruction In 224 4TCLCLb110 ns TLLPL ALE Low to PSEN Low 53 TC...

Страница 11: ...AUTOMOTIVE 80C51FA 83C51FA EXTERNAL PROGRAM MEMORY READ CYCLE 270501 12 EXTERNAL DATA MEMORY READ CYCLE 270501 13 EXTERNAL DATA MEMORY WRITE CYCLE 270501 14 11...

Страница 12: ...etup to Clock 700 10TCLCLb133 ns Rising Edge TXHQX Output Data Hold after 50 2TCLCLb117 ns Clock Rising Edge TXHDX Input Data Hold After Clock 0 0 ns Rising Edge TXHDV Clock Rising Edge to Input 700 1...

Страница 13: ...RST pin is now RESET pin 3 RST pin description is now RESET pin description 4 Figure 6 ICC vs Frequency has been corrected to show test conditions 5 ICC Max spec has been corrected 6 A C Characterist...

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