TX-NR1000
IC BLOCK DIAGRAM AND DESCRIPTION
WM8719(24 bit differential stereo DAC with volume control)
PCM/DSD
LATCH SDIN SCLK SDOUT ZEROFR ZEROFL
CONTROL INTERFACE
BCKIN
LRCIN
DIN
DSDCLK64
DSDCLK128
DSDR
DSDL
AGND DGND MCLK AVDD DVDD VREFP VREFP
VOUTRP
VOUTRN
VOUTLP
VOUTLN
VMID
SERIAL
INTER-
FACE
OSD DATA
INTER-
FACE
MUTE
MUTE
DIGITAL
FILTERS
SIGMA
DELTA
MODULATOR
SIGMA
DELTA
MODULATOR
MUX
MUX
PCM/DSD
RIGHT
DAC
LEFT
DAC
SCLK
SDIN
AVDD
VREFP
LRCLK
LATCH
DVDD
DVSS
AVSS
VMID
ZEROFR
VOUTRN
VOUTRP
VREFN
Top View
8
7
6
5
4
3
2
1
21
22
23
24
25
26
27
28
MCLK
SDOUT
DSDCLK64
DSDCLK128
NC
BCLK
DIN
9
10
11
12
13
14
18
19
20
NC
15
16
17
VOUTLP
VOUTLN
ZEROFL
DSDR
DSDL
NC
PIN NAME
TYPE
DESCRIPTION
1
LRCIN
Digital input
PCM DAC sample clock input
2
LATCH
Digital input
Serial control load input
3
SCLK
Digital input
Serial control data input clock
4
SDIN
Digital
Serial control data input clock
5
DVDD
Supply
Digital positive supply
6
DGND
Supply
Digital ground supply
7
AVDD
Supply
Analog ground supply
8
VREFP
Supply
DAC positive reference
9
VREFN
Supply
DAC negative reference
10 AGND
Supply
Analog ground supply DAC positive reference
11 VMID
Analog output
Mid rail decoupling point
12 ZEROFR
Digital output
Infinite ZERO detect flag for right channel
Analog output
Right channel DAC output positive
Analog output
Right channel DAC output negative
Analog output
Left channel DAC output positive
Analog output
Left channel DAC output negative
Digital output
Infinite ZERO detect flag for left channel
Digital input
Right channel DSD bitstream input
Digital input
Left channel DSD bitstream input
Digital bi-directional DSD format clock at 64fs
23 DSDCLK128 Digital bi-directional DSD format clock at 128fs.(Optional for OSD bi-phase mode)
24 NC
25 SDOUT
Digital output
Serial control data output
26 MCLK
Digital input
Master clock input
27 BCLKIN
Digital input
PCM audio data bit clock input
28 DIN
Digital input
PCM serial audio data input
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