DTR-7.6
IC BLOCK DIAGRAMS AND DESCRIPTIONS
SiI9031(HDMI PanelLink Cinema Receiver)
Pin #
Pin Name
I/O
Description
Use
73
DGND
ACR PLL GND
Ground
74
DVCC18
ACR PLL VCC (1.8V)
Power
75
IOGND
Input/Output Pin GND
Ground
76
IOVCC
Input/Output Pin VCC (3.3V)
Power
77
MUTEOUT
O
Mute Audio Output
Digital Audio
78
SPDIF
O
S/PDIF Audio Output
Digital Audio
79
CVCC18
Digital Logic VCC (1.8V)
Power
80
CGND
Digital Logic GND
Ground
81
SD3
O
I2S Serial Data Output
Digital Audio
82
SD2
O
I2S Serial Data Output
Digital Audio
83
SD1
O
I2S Serial Data Output
Digital Audio
84
SD0
O
I2S Serial Data Output
Digital Audio
85
WS
O
I2S Word Select Output
Digital Audio
86
WCK
O
I2S Serial Clock Output
Digital Audio
87
MCLKIN
I
Audio Master Clock Input Reference
Digital Audio
88
MCLKOUT
O
Audio Master Clock Output
Digital Audio
89
IOVCC
Input/Output Pin VCC (3.3V)
Power
90
IOGND
Input/Output Pin GND
Ground
91
CGND
Digital Logic GND
Ground
92
CVCC18
Digital Logic VCC (1.8V)
Power
93
NC
No connect.
Configuration/Programming
94
AUDPVCC18
ACR PLL VCC (1.8V)
Power
95
AUDPGND
ACR PLL GND
Ground
96
XTALOUT
O
Crystal Clock Output
Digital Audio
97
XTALIN
I
Crystal Clock Input
Digital Audio
98
XTALVCC
ACR PLL Crystal Input VCC
Power
99
REGVCC
ACR PLL Regulator VCC
Power
100
NC
No connect.
Configuration/Programming
101
RSVDL
I
Reversed, must be tied LOW.
Configuration/Programming
102
RESET
I
Reset pin Active Low.
Configuration/Programming
103
SCDT
O
Indicates active video at HDMI input port.
Configuration/Programming
104
INT
O
Interrupt Output.
Configuration/Programming
105
CVCC18
Digital Logic VCC (1.8V)
Power
106
CGND
Digital Logic GND
Ground
107
CLK48B
I/O
Data Bus latch enable
Configuration/Programming
108
IOGND
Input/Output Pin GND
Ground
109
IOVCC
Input/Output Pin VCC (3.3V)
Power
110
Q23
O
24-bit Output Pixel Data Bus.
Digital Video
111
Q22
O
24-bit Output Pixel Data Bus.
Digital Video
112
Q21
O
24-bit Output Pixel Data Bus.
Digital Video
113
Q20
O
24-bit Output Pixel Data Bus.
Digital Video
114
CVCC18
Digital Logic VCC (1.8V)
Power
115
CGND
Digital Logic GND
Ground
116
Q19
O
24-bit Output Pixel Data Bus.
Digital Video
117
Q18
O
24-bit Output Pixel Data Bus.
Digital Video
118
Q17
O
24-bit Output Pixel Data Bus.
Digital Video
119
Q16
O
24-bit Output Pixel Data Bus.
Digital Video
120
IOGND
Input/Output Pin GND
Ground
O
Output Data Clock
Digital Video
IOVCC
Input/Output Pin VCC (3.3V)
Power
O
24-bit Output Pixel Data Bus.
Digital Video
O
24-bit Output Pixel Data Bus.
Digital Video
O
24-bit Output Pixel Data Bus.
Digital Video
O
24-bit Output Pixel Data Bus.
Digital Video
Digital Logic GND
Ground
Digital Logic VCC (1.8V)
Power
O
24-bit Output Pixel Data Bus.
Digital Video
O
24-bit Output Pixel Data Bus.
Digital Video
O
24-bit Output Pixel Data Bus.
Digital Video
O
24-bit Output Pixel Data Bus.
Digital Video
O
24-bit Output Pixel Data Bus.
Digital Video
IOVCC
Input/Output Pin VCC (3.3V)
Power
IOGND
Input/Output Pin GND
Ground
136
Q6
O
24-bit Output Pixel Data Bus.
Digital Video
137
Q5
O
24-bit Output Pixel Data Bus.
Digital Video
138
CGND
Digital Logic GND
Ground
139
CVCC18
Digital Logic VCC (1.8V)
Power
140
Q4
O
24-bit Output Pixel Data Bus.
Digital Video
141
Q3
O
24-bit Output Pixel Data Bus.
Digital Video
142
Q2
O
24-bit Output Pixel Data Bus.
Digital Video
143
Q1
O
24-bit Output Pixel Data Bus.
Digital Video
144
Q0
O
24-bit Output Pixel Data Bus.
Digital Video
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