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2.5” SATA SSD 3MR2-P
39
Rev 1.0 TPS, Apr., 2017
6. AES Algorithm Certification
The following provides technical information about controller implementations that have been
validated as confirming to the Advanced Encryption Standard (AES) Algorithm, Deterministic
Random Bit Generator (DRBG) Algorithm, and Secure Hash Standard (SHS).
6.1 AES Algorithm
Val. No
Operational
Environment
Val. Date
Modes/States/Key sizes/Description/Notes
2474
Cadence
NC-verilog
hardware
simulator v10.20
May/24/2013
Using the tests found in The Advanced Encryption
Standard Algorithm Validation Suite (AESAVS).
This testing is performed by NVLAP accredited
Cryptographic And Security Testing (CST)
Laboratories.
ECB (e/d; 128, 192, 256)
XTS (KS: XTS_128)
KS: XTS_256
6.2 DRBG Algorithm
Val. No
Operational
Environment
Val. Date
Modes/States/Key sizes/Description/Notes
337
Cadence
NC-verilog
hardware
simulator v10.20
May/24/2013
Using the tests found in The DRBG Validation
Suite (DRBGVS). This testing is performed by
NVLAP accredited Cryptographic And Security
Testing (CST) Laboratories.
HashBased DRBG:
Prediction Resistance Tested: enabled and not
enabled (SHA-256)
6.3 SHS Algorithm
Val. No
Operational
Environment
Val. Date
Modes/States/Key sizes/Description/Notes
2093
Cadence
NC-verilog
hardware
simulator v10.20
May/24/2013
Has been validated as confirming to the Secure
Hash Algorithm specified in Federal Information
Processing Standard (FIPS) 180-3, Secure Hash
Standard (SHS), using tests described in the
Содержание 3MR2-P 128GB
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