Infineon XMC7200, Инструкция по использованию

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Application Note 3 of 33 002-33887 Rev. *A
2022-05-25
Using the Watchdog Timer in XMC7000 family MCUs
Introduction
1 Introduction
This application note describes the watchdog timer (WDT) for the XMC7000 family MCU. A WDT detects an
unexpected firmware execution path by generating warning interrupts, faults, or resets. It allows the system to
recover from an unsafe execution of an application program.
The WDT includes different counters that are used to observe a predetermined period and monitors the normal
operation of the application software by periodically clearing the timer. When the WDT reaches the
predetermined period, it detects the condition as an abnormality and generates a reset or an interrupt, or a
fault event.
XMC7000 supports two types of WDTs:
•
A Basic WDT
•
A Multi-counter WDT (MCWDT).
Both WDTs support window mode which allows defining an upper and lower time limit within which the
watchdog timer must be served. The Basic WDT is activated by hardware after reset release. Its operation mode
is set by the application software during the initial setting. It counts in Active, Sleep, DeepSleep, and Hibernate
power modes. The MCWDT is activated and configured by the application software. It counts in Active, Sleep,
and DeepSleep power modes.
This document is applicable for XMC7100 series, XMC7200 series devices. Figure 1 shows the block diagram of
the WDT. It includes both sub-structures, the Basic WDT, and the MCWDT. See the “ Watchdog Timer ” chapter of
the Architecture Technical Reference Manual (TRM) for more details.
Basic Watchdog Timer
Multi Counter
Watchdog Timers
Device registers
AHB interface
LFCLK
(Low-frequency clock)
Clock
CFG/STATUS
Reset
Interrupt
Clock
CFG/STATUS
Reset
Interrupt
WIC
(Wakeup Interrupt
Controller)
Device Reset
ILO0
(32-kHz low-speed
oscillator)
FAULT
FAULT Structure
Interrupt Controller
Figure 1 WDT block diagram