Infineon TriBoard TC3X4L, Руководство пользователя, Страница: 38 / 49

User Manual 7-3 V1.2
TriBoard TC3X4L TH V1.0 and TriBoard TC3X4L V1.0 2019-09
TriBoard Manual TC3X4L
Hardware: TriBoard TC3X4L TH V1.0 and TriBoard TC3X4L V1.0
Schematic and Layout
Figure 7-2 Schematic -
Clock, Config, Debug, Ports and ADC
1 1
2 2
3 3
4 4
5 5
6 6
7 7
8 8
D
D
C
C
B
B
A
A
2
Infineon Technologies AG
A
T
V
M
C
ACE ATV CES
Am Campeon 1-12 D-85579 Neubiberg T
el.: +49-89-234-0
7
15.10.2018
Number: Date: Sheet:
of
TriBoard TC3X4L Clock, Config, Debug, Ports, ADC
1.0
Revision:
G
:\
Technic
a
l_Support
\Tri
C
ore
\T
ri
B
oard
\E
D
A
_
D
X
P
\Tri
B
oard
A
U
R
IX
2
G
\T
ri
B
oard
T
C
3
X
4L\Tri
B
oard
T
C
3
X
4
L
V
1
.X
\C
lk
_
C
fg
_
D
bg_Port
s_
A
dc.sch
F
ile:
P21 .6
PORT[00..33]
CLOCK & TE
S
T
M
ODE
JT
AG / DAP / OCDS1
XTAL1
81
XTAL2
82
VSS(OSC)
80
P20.2 / TE
S
T
M
ODE
94
VEXT(OSC)
83
VDD(OSC)
79
T
RST
91
T
CK / DAP0
92
P21.6 / TDI
88
T
M
S / DAP1
89
P21.7 / TDO / DAP2
90
U201B T
C3X4_LQFP
P15.5 / SDA0
114
P20.10
104
P20.14
108
P11.6 / TXEN
134
P11.9 / RXD1A
135
P11.3 / TXD0
133
P14.1 / ARX0A
119
P14.0 / ATX0
118
P15.1 / ARX1A
110
P15.0 / ATX1
109
P20.11
105
P20.12
106
P20.13
107
P20.8 / CAN00_TXD
102
P20.9 / REQ7_0
103
VFLE
X
136
P11.12 / REFCLKA
139
P11.10 / RXD0A
137
P11.2 / TXD1
132
P15.4 / SCL
113
P33.5
61
P20.7 / CAN00_RXDB
101
P11.11 / RXDVA
138
ON BOARD USED PERIPHERALS / PINS
P15.6 / MT
SR2
115
P33.7
63
P33.4
60
P33.6
62
ASCLIN
CAN
QSPI / TL
F35584
E
RAY I2C
LED
s
P14.4 / HWCFG6
122
P14.2 / HWCFG2
120
P33.8 / SMU_FSP0
64
P33.9
65
P21.3 / RXD0P
85
P21.4 / TXD0N
86
P21.5 / TXD0P
87
P14.3 / HWCFG3
121
P10.5 / HWCFG4
143
P10.6 / HWCFG5
144
P20.0 / SYSCLK
93
P21.2 / RXD0N
84
HSCT
HWCFG
P33.10
66
P33.11
67
E
T
H
ERNET
BUTT
ON
P02.0 / TXD0A
1
P02.1 / RXD0A
2
P02.2 / TXD0B
3
P02.3 / RXD0B
4
P02.4 / TXEN0A
5
P02.5 / TXEN
0
B
6
P13.1 / CAN10_RXDD
129
P13.0 / CAN10_TXD
128
P15.8 / SCLK2
117
P14.5 / HWCFG1
123
P10.2 / REQ2_0
141
P10.1
140
P14.6 / SLSO22
124
P15.2 / MRST2E
111
P10.3 / REQ3_0
142
P00.0 / MDIOA
11
P02.8 / MD
C
9
P02.7
8
U201C T
C3X4_LQFP
PORT[00..33]
P20 .2
P21.7
GND
R206 opt
XTAL[1..2]
XTAL1 XTAL2
R203 50R_opt
VSSOSC
D
E
BUG..
R207 0R
C202 10pF
C201 10pF
VSSOSC
VSSOSC
1 2
Y201 20MH
z
R201 10K
V_UC
P20.2
R202 opt
GND
XTAL[1..2]
R204 0R R205 0R
R216 0R
DAP 2
R209 0R
CB201 330n
R208 0R
CB202 330n
VDD
VSSOSC
V_UC
VSSOSC
VDDOSC
VEXTO
S
C
AN[0..47]
V_VR
CB204 470n
GND
VDDM
+
3V3
F
OR 5V ADC
F
OR 3,3V ADC
AN0 / EDS3PA
57
AN1 / EDS3NA
56
AN2 / EDS0PA
55
AN3 / EDS0NA
54
E
VADC / EDSADC
AN4
53
AN5
52
AN6
51
AN35
34
AN7
50
AN8
49
AN10
48
AN11
47
AN12 / EDS0PB
46
AN13 / EDS0NB
45
AN16
40
AN17 / P40.10
39
AN20 / EDS2PA
38
AN21 / EDS2NA
37
AN24 / EDS2PB / P40.0
36
AN25 / EDS2NB / P40.1
35
AN44 / EDS1PC
29
AN45 / EDS1NC
28
AN46 / EDS1PD
27
AN47 / EDS1ND
26
VAGND1
41
VAREF1
42
VDDM
44
VSSM
43
AN36 / EDS1PA / P40.6
33
AN37 / EDS1NA / P40.7
32
AN38 / EDS1PB / P40.8
31
AN39 / EDS1NB / P40.9
30
VAGND2 / AN42
25
VAREF2 / AN43
24
U201E T
C3X4_LQFP
R222 6R8
CB205 2,2
μ
F
GND
VAREF1
VDDM
R223 6R8
CB206 2,2
μ
F
GND
VAREF2
VDDM
R220 1R2 R221 1R2_opt
PORTS
P13.3
131
P13.2
130
P32.4
72
P00.12
21
P00.9
20
P00.4
15
P00.5
16
P00.3
14
P00.2
13
P00.1
12
P20.3
95
P20.6
100
P00.8
19
P00.7
18
P00.6
17
P02.6
7
P33.12
68
P33.13
69
P22.3
77
P22.2
76
P15.3
112
P22.0
74
P22.1
75
P15.7
116
P23.1
73
U201D T
C3X4_LQFP
P00.1 P00.2 P00.3 P00.4 P00.5 P00.6 P00.7 P00.8 P00.9 P00.12
GND
Switch ON m
eans t
he
corres
ponding signal is low.
Switch OFF
m
eans t
he
corres
ponding signal is high.
R230 1K5 R232 1K5 R234 1K5 R236 1K5 R240 1K5_opt R238 1K5_opt
P14.5 P14.2 P14.4 P10.5 P10.6 P14.3
HWCFG3 HWCFG4 HWCFG5 HWCFG6
(about configuration see the manual of ass
embled device)
GND
1 2 3 4
8 7 6 5
1
S201 DIPSW-4
R231 47K R233 47K R235 47K R237 47K R239 47K R241 47K
V_UC V_UC V_UC V_UC V_UC V_UC
NOTE: S201 is for device configuration
S202 P33.11
R256 1K5
R255 47K
V_STB
Y
GND
DAP 2
/TRST DAP0 DAP1
D
E
BUG..
R212
33R
R214 0R R215 0R
DAP0 DAP0_A DAP1 DAP1_A
R213 33R
P13.1 P15.1 P14.1 P14.6 P10.2
P13.0 P15.4 P14.0 P15.0 P02.7 P02.2 P20.9 P20.10 SYSCLK P33.8 P02.3
P20.7
P20.8
P15.2 P15.5
P02.5 P33.10
VFLE
X
R211 0R
+
3V3
CB203 100n
P02.1 P10.1
RXD0_P RXD0_N P15.8 T
XD0_P
T
XD0_N
P15.6
P33.9 P02.4 P02.0
SYSCLK
1
T
XDP
3
GND
2
T
XDN
4
S
RXDP
5
RXDN
6
X201
HSCT0-opt
GND
R254 0R R253 0R R250 0R R251 0R R252 0R
P21.2 P21.5 P21.4 P20.0
P21.3
P33 .1 1
C207 47nF
GND
AN44
C208 47nF
GND
AN45
GND
AN7
C203 47nF C204 47nF
GND
AN20
C205 47nF
GND
AN21
R249 4K7 R248 4K7 R244 4K7 R245 4K7 R246 4K7
GND
P33.6 P33.4 P33.5 P33.7 P11.3 P11.2 P11.6
P02.6
P23.1
P15.3
AN [0 ..47]
AN0 AN1 AN2 AN3 AN4 AN5 AN6 AN8 AN7_I AN10 AN11 AN12 AN13 AN16 AN17 AN20_I AN21_I AN24 AN25
AN46 AN47
AN44_I AN45_I AN35 AN36 AN37 AN38 AN39
P10.5 P10.6 P14.4 P14.3 P33.11 P20.12 P20.14 P20.11 P20.13 P11.12 P11.10 P11.9 P11.11 P14.2 P14.5
P02.8 P00.0
P10.3
P33.12 P33.13 P32.4 P15.7 P20.3 P20.6 P22.0 P22.1
P22.3 P22.2
P13.2 P13.3