Introduction
›
The
Q
ueued
S
ynchronous
P
eripheral
I
nterface (QSPI) enables any
synchronous serial communication with external devices based on the
standardized SPI-bus signals: clock, data-in, data-out and slave select.
›
The QSPI works in full duplex mode either as Master or Slave with up to
50 Mbit/s.
›
The DMA module channels can be configured to transfer data from/to
QSPI FIFOs to/from internal RAM Memory without any CPU intervention.
›
This example is based on the Infineon Low Level Drivers to demonstrate
SPI Master Slave Communication with minimum CPU intervention.
3
2020-01-17
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