ICL8001G / ICLS8082G
Design Guidelines
Design Optimizations
Application Note
21
Version 2.0, 2011-04-14
Figure 15
Discrete power stabilization circuit
As the on-time of the power MOSFET Q1 is reduced the LED driver power is also reduced. The parameters should
be adjusted so that the smoothed voltage at the base of Q21 is equal to the reference voltage at the base of Q22
at the nominal input voltage. The maximal additional voltage drop on the CS pin should be approximately 10 % to
20 % of the original CS limit at the maximum input voltage. As the waveform of the additional voltage drop at the
CS pin has the same slope as Vin(t), the input current will not change significantly, but still enable designs with a
high power factor and low harmonic distortion. Careful optimization of the discrete stabilization circuit containing
the components stated in the BOM below when connected to the 230 V / 10 W driver delivers variations of
∆ILED ≤ + 0.3 % and ∆ILED ≤ –1.3 % at ∆Vac = +10 % and ∆Vac = –10 % respectively. There is no influence on
output short circuit and output open loop detection.
Figure 16
Bill of Materials (BOM) for power stabilization circuit
Component
Value
Package
Q21
BC860B (PNP)
SOT23
Q22
BC860B (PNP)
SOT23
C21
470nF/50V
0805
R21
2.2MΩ
0805
R22
75kΩ
0805
R23
1MΩ
0805
R24
10k
0805
R25
10k
0805
R26
1k5
0805
R27
68k
0805
D21
ZMM6V8
Minimelf
BOM of Discrete Power Stabilization Circuit for 230V / 10W
ICL8001G LED Driver Demoboard
