CYTVII-B-E-2M-176-CPU Evaluation Board User Guide, Document Number. 002-29049 Rev. **
29
Schematics of CPU Board
Figure A-12. LQFP-176 P5
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
(12,21,23)
BB_SPI0_MISO
{19}
BB_SPI0_MOSI
{19}
BB_SPI0_CLK
{16}
TRACE_CLOCK
{6,19}
BB_SPI0_SS
{16}
BB_CAN5_TXD
{17}
BB_CAN5_RXD
{17}
BB_USER_LED4
{18,19}
BB_SPI0_WP
{18,19}
GPIO_061
{18,19}
BB_USER_LED3
{19}
BB_USER_LED2
{19}
BB_CAN0_S
{18,19}
BB_CAN1_S
{16,18}
BB_SPI0_HOLD
{18,19}
BB_USER_BUTTON_5
{18,19}
GPIO_056
{19}
GPIO_057
{19}
GPIO_058
{19}
GPIO_059
{19}
GPIO_060
{19}
GPIO_062
{19}
GPIO_063
{19}
GPIO_064
{19}
GPIO_065
{19}
GPIO_066
{19}
GPIO_067
{19}
GPIO_068
{19}
GPIO_069
{19}
BB_USER_LED0
{16,18}
SCH Title :
Size
Document Number
Rev
Date:
Sheet
o f
CYPRESS SEMICONDUCTOR © 2018
Page Title :
Drawn By
CYPRESS SEMICONDUCTOR
198 CHAMPION COURT
SAN JOSE, CA 95134
(408) 943-2600
Approved By
6239956
C
CYTVII-B-E-2M-176-CPU BOARD
A4
13
20
Wednesday, October 30, 2019
LQFP-176 P5
VJYM
SPPD
SCH Title :
Size
Document Number
Rev
Date:
Sheet
o f
CYPRESS SEMICONDUCTOR © 2018
Page Title :
Drawn By
CYPRESS SEMICONDUCTOR
198 CHAMPION COURT
SAN JOSE, CA 95134
(408) 943-2600
Approved By
6239956
C
CYTVII-B-E-2M-176-CPU BOARD
A4
13
20
Wednesday, October 30, 2019
LQFP-176 P5
VJYM
SPPD
SCH Title :
Size
Document Number
Rev
Date:
Sheet
o f
CYPRESS SEMICONDUCTOR © 2018
Page Title :
Drawn By
CYPRESS SEMICONDUCTOR
198 CHAMPION COURT
SAN JOSE, CA 95134
(408) 943-2600
Approved By
6239956
C
CYTVII-B-E-2M-176-CPU BOARD
A4
13
20
Wednesday, October 30, 2019
LQFP-176 P5
VJYM
SPPD
U4E
LQFP_176_2M
P17.2/PWM_59/PWM_60_N/TC_59_TR0/TC_60_TR1/PWM_H_2_N/SCB3_TX/SCB3_SDA/SCB3_MOSI
118
P17.3/PWM_58/PWM_59_N/TC_58_TR0/TC_59_TR1/PWM_H_3/SCB3_RTS/SCB3_SCL/SCB3_CLK/TRIG_IN[26]
119
P17.4/PWM_57/PWM_58_N/TC_57_TR0/TC_58_TR1/PWM_H_3_N/SCB3_CTS/SCB3_SEL0/TRIG_IN[27]
120
P17.5/PWM_56/PWM_57_N/TC_56_TR0/TC_57_TR1/SCB3_SEL1
121
P17.6/PWM_M_4/PWM_56_N/TC_M_4_TR0/TC_56_TR1/SCB3_SEL2
122
P17.7/PWM_M_5/PWM_M_4_N/TC_M_5_TR0/TC_M_4_TR1
123
P18.0/PWM_M_6/PWM_M_5_N/TC_M_6_TR0/TC_M_5_TR1/PWM_H_0/SCB1_RX/SCB1_MISO/FAULT_OUT_0/ADC[2]_0
124
P18.1/PWM_M_7/PWM_M_6_N/TC_M_7_TR0/TC_M_6_TR1/PWM_H_0_N/SCB1_TX/SCB1_SDA/SCB1_MOSI/FAULT_OUT_1/ADC[2]_1
125
P18.2/PWM_55/PWM_M_7_N/TC_55_TR0/TC_M_7_TR1/PWM_H_1/SCB1_RTS/SCB1_SCL/SCB1_CLK/ADC[2]_2
126
P18.3/PWM_54/PWM_55_N/TC_54_TR0/TC_55_TR1/PWM_H_1_N/SCB1_CTS/SCB1_SEL0/TRACE_CLOCK/ADC[2]_3
127
P18.4/PWM_53/PWM_54_N/TC_53_TR0/TC_54_TR1/PWM_H_2/SCB1_SEL1/TRACE_DATA_0/ADC[2]_4
128
P18.5/PWM_52/PWM_53_N/TC_52_TR0/TC_53_TR1/PWM_H_2_N/SCB1_SEL2/TRACE_DATA_1/ADC[2]_5
129
P18.6/PWM_51/PWM_52_N/TC_51_TR0/TC_52_TR1/PWM_H_3/SCB1_SEL3/CAN1_2_TX/TRACE_DATA_2/ADC[2]_6
130
P18.7/PWM_50/PWM_51_N/TC_50_TR0/TC_51_TR1/PWM_H_3_N/CAN1_2_RX/TRACE_DATA_3/ADC[2]_7
131
P19.0/PWM_M_3/PWM_50_N/TC_M_3_TR0/TC_50_TR1/TC_H_0_TR0/SCB2_RX/SCB2_MISO/CAN1_3_TX/FAULT_OUT_2
134
P19.1/PWM_26/PWM_M_3_N/TC_26_TR0/TC_M_3_TR1/TC_H_0_TR1/SCB2_TX/SCB2_SDA/SCB2_MOSI/CAN1_3_RX/CXPI3_RX/FAULT_OUT_3
135
P19.2/PWM_27/PWM_26_N/TC_27_TR0/TC_26_TR1/TC_H_1_TR0/SCB2_RTS/SCB2_SCL/SCB2_CLK/CXPI3_TX/TRIG_IN[28]
136
P19.3/PWM_28/PWM_27_N/TC_28_TR0/TC_27_TR1/TC_H_1_TR1/SCB2_CTS/SCB2_SEL0/CXPI3_EN/TRIG_IN[29]
137
P19.4/PWM_29/PWM_28_N/TC_29_TR0/TC_28_TR1/TC_H_2_TR0/SCB2_SEL1
138
P20.0/PWM_30/PWM_29_N/TC_30_TR0/TC_29_TR1/TC_H_2_TR1/SCB2_SEL2/LIN5_RX
139
P20.1/PWM_49/PWM_30_N/TC_49_TR0/TC_30_TR1/TC_H_3_TR0/LIN5_TX
140
P20.2/PWM_48/PWM_49_N/TC_48_TR0/TC_49_TR1/TC_H_3_TR1/LIN5_EN
141
P20.3/PWM_47/PWM_48_N/TC_47_TR0/TC_48_TR1/SCB1_RX/SCB1_MISO/CAN1_2_TX
142
P20.4/PWM_46/PWM_47_N/TC_46_TR0/TC_47_TR1/SCB1_TX/SCB1_SDA/SCB1_MOSI/CAN1_2_RX
143
P20.5/PWM_45/PWM_46_N/TC_45_TR0/TC_46_TR1/SCB1_RTS/SCB1_SCL/SCB1_CLK/CXPI3_RX
144
P20.6/PWM_44/PWM_45_N/TC_44_TR0/TC_45_TR1/SCB1_CTS/SCB1_SEL0/CXPI3_TX
145
Содержание Cypress CYTVII-B-E-2M-176-CPU
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