Infineon Cypress BCM43353, Руководство пользователя

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Document Number: 002-14949 Rev. *G Page 16 of 113
PRELIMINARY
CYW43353
3.3 Frequency Selection
Any frequency within the ranges specified for the crystal and TCXO reference may be used. These include not only the standard
mobile platform reference frequencies of 19.2, 19.8, 24, 26, 33.6, 37.4, and 38.4 MHz, but also other frequencies in this range with
an approximate resolution of 80 Hz. The CYW43353 must have the reference frequency set correctly in order for any of the UART or
PCM interfaces to function correctly, since all bit timing is derived from the reference frequency.
Note: he fractional-N synthesizer can support many reference frequencies. However, frequencies other than the default require
support to be added in the driver plus additional, extensive system testing. Contact Cypress for details.
The reference frequency for the CYW43353 may be set in the following ways:
■
Set the xtalfreq=xxxxx parameter in the nvram.txt file (used to load the driver) to correctly match the crystal frequency.
■
Autodetect any of the standard handset reference frequencies using an external LPO clock.
For applications where the reference frequency is one of the standard frequencies commonly used, the CYW43353 automatically
detects the reference frequency and programs itself to the correct reference frequency. In order for automatic frequency detection to
work correctly, the CYW43353 must have a valid and stable 32.768 kHz LPO clock that meets the requirements listed in
Table 3 and
is present during power-on reset.
Phase noise
6
(IEEE 802.11a)
37.4 MHz clock at 10 kHz offset – – – – – –137 dBc/Hz
37.4 MHz clock at 100 kHz offset – – – – – –144 dBc/Hz
Phase noise
6
(IEEE 802.11n, 2.4 GHz)
37.4 MHz clock at 10 kHz offset – – – – – –134 dBc/Hz
37.4 MHz clock at 100 kHz offset – – – – – –141 dBc/Hz
Phase noise
6
(IEEE 802.11n, 5 GHz)
37.4 MHz clock at 10 kHz offset – – – – – –142 dBc/Hz
37.4 MHz clock at 100 kHz offset – – – – – –149 dBc/Hz
Phase noise
6
(IEEE 802.11ac, 5 GHz)
37.4 MHz clock at 10 kHz offset – – – – – –148 dBc/Hz
37.4 MHz clock at 100 kHz offset – – – – – –155 dBc/Hz
1. (Crystal) Use WRF_XTAL_IN and WRF_XTAL_OUT.
2. See External Frequency Reference for alternative connection methods.
3. For a clock reference other than 37.4 MHz, 20 × log10(f/37.4) dB should be added to the limits, where f = the reference clock frequency in MHz.
4. The frequency step size is approximately 80 Hz.
5. It is the responsibility of the equipment designer to select oscillator components that comply with these specifications.
6. Assumes that external clock has a flat phase-noise response above 100 kHz.
Table 2. Crystal Oscillator and External Clock—Requirements and Performance (Cont.)
Parameter Conditions/Notes
Crystal
1
External Frequency
Reference
2 3
Min. Typ. Max. Min. Typ. Max. Units