Infineon AN84858, Быстрый старт

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Application Note 10 of 45 001-84858 Rev. *N
2021-03-23
PSoC 4 Programming Using an External Microcontroller (HSSP)
Hardware Connections for HSSP Programming
3 Hardware Connections for HSSP Programming
HSSP programming in PSoC 4 uses the SWD interface pins (SWDIO and SWDCK) and the external reset pin
(XRES). The host programmer pin drive mode requirements are explained in the
“ Physical Layer ” section in the
programming specifications document listed in the Related Documentation section of this document. Figure
3 shows the basic hardware connection required between the host programmer and the target device.
Host
Programmer
PSoC 40xx
V
DD
V
DDD
SWDCK
XRES
SWDIO
GND
SWDCK ( P3[1]] )
XRES
(1)
SWDIO ( P3[0] )
GND
V
SSD
1.8 V
– 5.5 V
0.1 uF
Host
Programmer
PSoC 4xxx/
PSoC 4xxxM/
PSoC 4xxxL/PSoC 40xxS/PSoC
41xxS/ PSoC 4100PS/ PSoC
4100S Plus
V
DD
V
DDD
SWDCK
XRES
SWDIO
GND
SWDCK ( P3[3]] )
XRES
SWDIO ( P3[2] )
V
DD
GND
V
SSD
1.8 V
– 5.5 V
0.1 uF
Host
Programmer
PSoC 4xx7_BLE/
PSoC 4xx8_BLE
V
DD
V
DDD
SWDCK
XRES
SWDIO
GND
SWDCK ( P0[7] )
XRES
SWDIO ( P0[6] )
V
DD
GND
V
SSD
1.8 V
– 5.5 V
0.1 uF
(1)
Toggle V
DDD
pin for devices
that do not have an XRES pin
Figure 3 Basic Host/Target Connections