IKA SMRA + MRA, Руководство пользователя

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SMRA - SSI and BiSS
NOTE
For any information on fault conditions and their solution please refer to the
sections “8 - Error and fault diagnostics” on page 34 and “10 - Troubleshooting”
on page 36.
CRC
Correct transmission control (inverted output). Cyclical Redundancy Checking is
an error checking which is the result of a “Redundancy Checking” calculation
performed on the message contents. This is intended to check whether the
transmission has been performed properly. It is 6-bit long.
Polynomial: X
6 +X 1 +1 (binary: 1000011)
Logic circuit
6.3 Control Data CD
Main control data is described in this section. Please refer to the official BiSS
documents for complete CD structure: “BiSS C Protocol Description” in the BiSS
homepage (http://www.biss-interface.com/).
Register address
It allows to enter the address of the register you need either to read or write. It
is 7-bit long.
RW
RW
= “01”: when you need to write in the register.
RW
= “10”: when you need to read from the register.
It is 2-bit long.
MAN SMRA SSI_BiSS E 1.4.odt 6 - BiSS C-mode interface 25 of 40
1st
stage
X
1
X
2
X
3
X
5
Input Data (starts from MSB)
X
0
2nd
stage
3rd
stage
4th
stage
5th
stage
6th
stage
X
4