IFR FM/AM-500, Руководство по обслуживанию

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7-6 LOW LOOP SYNTHESIZER
7-6-1 THEORY OF OPERATION (Refer to Figure 7-6 and Low Loop Circuit
Schematic in Section 10)
PHASE
LOCK
INDICATOR
f
100 Hz
PHASE
-
DETECTOR
t
RF FREQ
THUMBWHEEL +N
SWITCHES
-
�
TO GEN AUDIO MOOILE _
/LDW LOOP SYNTHESIZER MODULE/
vco
t
793-77.3 MHz
-
TO IF MOOULE
-
Figure 7-6 Low Loop Synthesizer Block Diagram
A. GENERAL
AVCO in the Low Loop Synthesizer produces the 79.3 to 77.3 MHz
frequency required by the third mixer in the IF Module. The
VCO output is buffered, then split, with one branch being buf­
fered further and fed into the third mixer. The second branch
is buffered and fed into a +N divider which is controlled by
the RF FREQUENCY Thumbwheels. This divider divides by a factor
of between 793,000 and 773,001.
The output of the divider network, when phase-locked, is a
100 Hz pulse furnished to a phase comparator. The comparator
compares this signal with a 100 Hz reference signal from the
Digital Counter. Any difference between the signals causes
corresponding changes in the detector's output voltage. This
output voltage is integrated and then fed to the VCO to vary
its frequency. Thus, if the divider output frequency is not
100 Hz, the phase comparator steers the VCO frequency to obtain
the 100 Hz divider output frequency.
A second output of the phase comparator operates in the phase
lock indicator circuit. When the phase of the VCO output dif­
fers from the phase of the reference signal, the cathode of the
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