Industrial Electronic Engineers, Inc.
SIZE
A
CODE IDENT NO.
05464
S03875–21–0214
Van Nuys, California
SCALE N/A
REV A
SHEET 9
Note
: Addresses 00h through 0Fh are reserved for CG RAM Addressing. Addresses 10h through 1Fh and
80h through 9Fh are not used.
2.2.7
Character Generator RAM (CG RAM)
The CG RAM allows the user to define 8 types of 5 X 7 character patterns. Figure 4 shows the relationship
between CG RAM addresses and data patterns (Refer to Set CG RAM Address and Write to CG or DD RAM
instructions).
Character Codes
(DD RAM Data)
CG RAM
Address
Character Patterns
(CG RAM Data)
7
6
5
4
3
2
1
0
5
4
3
2
1
0
7
6
5
4
3
2
1
0
←
Higher Order Bits
Lower Order Bits
→
←
Higher Order Bits
Lower Order Bits
→
←
Higher Order Bits
Lower Order Bits
→
0
0
0
*
*
*
1
1
1
1
0
0
0
1
1
0
0
0
1
0
1
0
1
0
0
0
1
Character
0
1
1
1
1
1
1
0
Pattern
0
0
0
0
*
0
0
0
0
0
0
1
0
0
1
0
1
0
0
Example
1
0
1
1
0
0
1
0
1
1
0
1
0
0
0
1
1
1
1
*
*
*
0
0
0
0
0
←
Cursor
Figure 4 Relationship Between CG RAM Address, Character Codes (DD RAM)
and Character Patterns (CG RAM Data)
NOTES:
1) The CG RAM consists of 64 bytes. Any bytes not used for character pattern information can be
used for general purpose data RAM. The 5, 6 and 7 bits are never used for character pattern
information and are always available for use.
2) The 0, 1 and 2 bits of character code correspond to the 3, 4 and 5 bits of the CG RAM address.
3) The 0, 1 and 2 bits of the CG RAM address specify the row of the character pattern.
4) The 8th row of the character pattern corresponds to the cursor character pattern. If any bit in the
row is "1", then the corresponding cursor bit is a "1" regardless of cursor position. (For most
applications, the data should be "0" in this row, which allows for normal cursor operation on the
character.)
5) Since bit 3 is a "don't care", two character codes represent the same special character. For
example, a character code of 07 (hexadecimal) selects the same character pattern as OF
(hexadecimal).
2.2.8
Parallel/Serial Data Conversion Circuitry, Timing Generator Circuitry
These blocks control the interface to the LCD drivers.
3.0
THEORY OF OPERAT ION
The serial input option was designed to allow users to send data and control codes to the display module via
the industry standard RS–232C serial interface. This follows the interface protocol of the parallel input Daystar
Nova display modules with few exceptions.
