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©2018 Integrated Device Technology, Inc.
August 30, 2018
VersaClock
®
6E Family Register Descriptions and Programming Guide
PLL Loop Filter Settings
below shows the Loop Filter components that are programmable via the RC control registers.
Figure 4. PLL Loop Filter Components
where
Rz is programmable with register 0x1E.
Cz is fixed and not programmable. Cz = 500pF.
C2 is the 2nd Pole capacitor and programmable with Register 0x1E.
R3 and C3 are the 3rd pole RC values programmable with register x1F.
The Icp charge pump current is programmable in register x1D.
Table 41. RAM1 – 0x1E: RC Control Register
Bits
Default Value
Name
Function
D7
1
lpf_cnf_rz[4:0]
LPF resistor control, Rz = (31 - cnf_rz) * 1.5K.
1.5K = 11110.
46.5K = 00000.
Setting 11111 is not allowed.
D6
0
D5
1
D4
1
D3
1
D2
0
lpf_cnf_cp[2:0]
LPF 2nd pole capacitance control.
000 = 12pF to 100 = 28pF step of 4pF.
Settings above 100 are not allowed.
D1
1
D0
0
