IDT EVK-UFT285-6-7, Руководство пользователя

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REVISION B 04/01/15 12
EVK-UFT285-6-7 EVALUATION BOARD USER GUIDE
Input Configuration
The inputs are configured with an ac-coupling termination scheme. This scheme allows flexibility for either differential or
single-ended inputs. The default configuration is as follows:
Table 1: Default Input Configuration
Differential Input
Connect the input signal to CLKx and nCLKx. For CLK0, the CLK0_S and nCLK0_s sense lines are available for observation of
the signal. They can be connected with 50ohm impedance cables to an oscilloscope with 50ohm termination, otherwise, they
should be terminated with 50ohm plugs in order prevent reflections.
Single-ended Input
Connect the input signal to CLKx and float nCLKx. For CLK0, connect CLK0_S with a 50ohm impedance cable to an oscilloscope
with 50ohm termination or terminate with a 50ohm plug.
Input Signals below 1MHz
For slow-frequency signals below 1MHz, we recommend that the coupling capacitors for the corresponding input be replaced
with zero-ohm resistors and that the signal input dc-offset be set so that it meets the device's Vcmr requirements. Refer to
Figure
3 to locate the components listed below.
Table 2: Input Termination Schemes
Input Default Termination Sense Lines
CLK0 50ohms to ground, ac-coupled into the device Use SMAs J15/J18 for observation of the input signal
CLK1 50ohms to ground, ac-coupled into the device Available but not connected. Populate R47 and R59 to observe
input signal on SMAs J23/J30
CLK2 50ohms to ground, ac-coupled into the device Not available
CLK3 50ohms to ground, ac-coupled into the device Not available
Signal Frequency
AC-coupling capacitors:
CLK0 (C121, C122)
CLK1 (C130,C131)
CLK2 (C150,C151)
CLK3 (C160,C161) Input Signal DC Offset
>1MHz 1µF Don't care
<1MHz

Must meet datasheet Vcmr specs