IDT 89HPES16NT2, Руководство пользователя

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IDT Non-Transparent Mode Operation
PES16NT2 User Manual 10 - 104 April 15, 2008
Notes
NTB External Endpoint Configuration Space Registers
All configuration space locations not listed in Table 10.8 return a value of zero when read. Writes to
these locations are ignored and have no side-effects.
Non-transparent bridge external endpoint configuration space registers may be read and written via the
slave SMBus interface and initialized from the serial EEPROM using the CSR system address formed by
adding the base address 0x3000 to the PCI configuration space offset address.
Note: In pdf format, clicking on a register name in the Register Definition column creates a jump
to the appropriate register. To return to the starting place in this table, click on the same register
name (in blue) in the register section.
Cfg.
Offset
Size
Register
Mnemonic
Register Definition
0x000 Word PCEE_VID PCEE_VID - Vendor Identification (0x000) on page 10-107
0x002 Word PCEE_DID PCEE_DID - Device Identification (0x002) on page 10-107
0x004 Word PCEE_PCICMD PCEE_PCICMD - PCI Command (0x004) on page 10-108
0x006 Word PCEE_PCISTS PCEE_PCISTS - PCI Status (0x006) on page 10-109
0x008 Byte PCEE_RID PCEE_RID - Revision Identification (0x008) on page 10-110
0x009 3 Bytes PCEE_CCODE PCEE_CCODE - Class Code (0x009) on page 10-110
0x00C Byte PCEE_CLS PCEE_CLS - Cache Line Size (0x00C) on page 10-110
0x00D Byte PCEE_MLTIMER PCEE_MLTIMER - Master Latency Timer (0x00D) on page 10-
110
0x00E Byte PCEE_HDR PCEE_HDR - Header Type (0x00E) on page 10-110
0x00F Byte PCEE_BIST PCEE_BIST - Built-on Self Test (0x00F) on page 10-111
0x010 DWord PCEE_BAR0 PCEE_BAR0 - Base Address Register 0 (0x010) on page 10-
111
0x014 DWord PCEE_BAR1 PCEE_BAR1 - Base Address Register 1 (0x014) on page 10-
112
0x018 DWord PCEE_BAR2 PCEE_BAR2 - Base Address Register 2 (0x018) on page 10-
112
0x01C DWord PCEE_BAR3 PCEE_BAR3 - Base Address Register 3 (0x01C) on page 10-
113
0x020 DWord PCEE_BAR4 PCEE_BAR4 - Base Address Register 4 (0x020) on page 10-
114
0x02C Word PCEE_SUBVID PCEE_SUBVID - Subsystem Vendor ID Pointer (0x02C) on
page 10-115
0x02E Word PCEE_SUBID PCEE_SUBID - Subsystem ID Pointer (0x02E) on page 10-115
0x034 Byte PCEE_CAPPTR PCEE_CAPPTR - Capabilities Pointer (0x034) on page 10-115
0x03C Byte PCEE_INTRLINE PCEE_INTRLINE - Interrupt Line (0x03C) on page 10-115
0x03D Byte PCEE_INTRPIN PCEE_INTRPIN - Interrupt PIN (0x03D) on page 10-115
0x03E Byte PCEE_MINGNT PCEE_MINGNT - Minimum Grant (0x03E) on page 10-115
0x03F Byte PCEE_MAXLAT PCEE_MAXLAT - Maximum Latency (0x03F) on page 10-116
Table 10.8 Non-Transparent Bridge External Endpoint Configuration Space Registers (Part 1 of 4)