IDT Installation of the EB12N3 Eval Board
Reset
EB12N3 Eval Board Manual (18-597-001)
2 - 6
November 2, 2006
Notes
Reset
The PES12N3 supports two types of reset mechanisms as described in the PCI Express specifications:
Fundamental Reset: This is a system generated reset that propagates along the PCI Express tree
through a single side-band signal PERST#, connected to the Root Complex, the PES12N3 and the
endpoints.
Hot Reset: This is an In-band Reset, communicated downstream via a link from one device to
another. Hot Reset may be initiated by software. This is further discussed in the 89HPES12N3 User
Manual. The EB12N3 evaluation board does not need to do anything specific to support Hot Reset.
Fundamental Reset
There are two types of Fundamental Resets which may occur on the EB12N3 evaluation board. Both
types of resets depend on the location of the shunt on header W13. Refer to the tables below:
Cold Reset:
Warm Reset: This is triggered by hardware while the device is powered on.
Downstream Reset
The PES12N3 provides three different downstream reset schemes. By default the reset scheme used is
the fundamental reset. There is also a software controlled reset for each downstream port through the
GPIO pins. Finally, there is a pgood controlled reset for each downstream port. When hot plugging is
enabled, this reset scheme creates a downstream port reset if pgood_ _N is not asserted. Selection of the
downstream reset is made by shunting different header pins as described in Table 2.9.
W13 Shunt Selection for Cold Reset
Shunt Description
Pins [1-2]
During initial power-on, the onboard voltage monitor (TLC7733D) will assert
the PCI Express Reset (PERSTN) input pin of the PES12N3.
Pins [2-3]
During initial power-on, the reset signal (PERSTN) will come from the
upstream edge connector.
Table 2.7 W13 Shunt Selection for Cold Reset
W13 Shunt Selection for Warm Reset
Shunt Description
Pins [1-2]
A warm reset can be initiated in two ways. Both events cause the onboard
voltage monitor (TLC7733D) to assert the PCI Express Reset (PERSTN)
input of the PES12N3 while the power is on. The two ways are:
–
by pressing a push-button switch (X4) located on EB12N3 board
–
if the system board IO Controller Hub asserts PERST# signal, which
propagates through the PCIe upstream edge connector of the EB12N3
Pins [2-3]
This will directly tie the upstream reset to the onboard fundamental reset.
Table 2.8 W13 Shunt Selection for Warm Reset
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