ICS Advent PCI-DIO48 Series, Руководство по эксплуатации продукта

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Manual 00650-529-1
Chapter 1: Introduction
Features
•
48 Bits of Digital Input/Output.
• Interrupt Generation on Input Change of State. (Model "48S")
•
Change-of-state Interrupt Software Enabled in Six 8-Input Ports.(Model "48S")
•
All 48 I/O Lines Buffered on the Board.
• I/O Buffers Can Be Enabled/Disabled under Program Control.
•
Four and Eight Bit Ports Independently Selectable for I/O.
•
Pull-Ups on I/O Lines.
• +5V Supply Available to the User.
• Compatible with Industry Standard I/O Racks like Gordos, Opto-22, Potter & Brumfield,
Western Reserve Controls, etc.
Applications
•
Automatic Test Systems.
• Laboratory Automation.
• Robotics.
•
Machine Control.
• Security Systems, Energy Management.
• Relay Monitoring and Control.
•
Parallel Data Transfer to PC.
• Sensing Switch Closures or TTL, DTL, CMOS Logic.
•
Driving Indicator Lights or Recorders.
These cards support 48 bits of parallel digital input/output on the PCI bus. They can be
programmed to accept inputs or to provide outputs on two groups of three 8-bit ports. Further, in
each group, one of the ports can be further divided into two four-bit nibbles.
The feature that distinguishes the "48S" model from the "48" card is that the state of all inputs can
be monitored and, if any one or more bits change state, a latched interrupt request can be
generated. Thus, it is not necessary to use software to continuously poll the inputs to detect a
change of state. The change-of-state interrupt is disabled/enabled by a software write to an
interrupt-enable register. Six bits in that register each control an eight-input port at one of two type
8255-5 Programmable Peripheral Interface chips. The change-of-state interrupt latch can be
cleared by a software write.
Also, bit C3 at each 24-bit port can be used as an external interrupt to the computer if the IEN
jumpers are installed. When bit C3 goes high (edge triggering), an interrupt is requested.
Interrupts from the ports are OR'ed together and OR'ed with the change-of-state interrupt.
Interrupt levels are assigned by the system.