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PIO/PEX-D24/D56 Series User Manual (Ver.3.1, Mar. 2015, PMH-005-31)

3. I/O Control Register

3.1 How to Find the I/O Address

The Plug & Play BIOS will assign an appropriate I/O address to each PIO/PISO

series card during the power-on stage. The fixed IDs of the PIO-D24/D56

series and PEX-D24/D56 cards are as following:

For PIO-D24U/D56U and PEX-D24/D56

Rev 1.0 or above

Vendor ID

0xE159

Device ID

0x0001

Sub-vendor ID

0x8080
0xC080

Sub-device ID

0x01

Sub-aux ID

0x40

For PIO-D24

Rev 1.0~Rev 5.0

Rev 6.0 or above

Vendor ID

0xE159

Vendor ID

0xE159

Device ID

0x0002

Device ID

0x0001

Sub-vendor ID

0x80

Sub-vendor ID

0x8080
0xC080

Sub-device ID

0x01

Sub-device ID

0x01

Sub-aux ID

0x40

Sub-aux ID

0x40

For PIO-D56

<Rev 1.0 ~ Rev 4.0>

Rev 5.0 or above

Vendor ID

0xE159

Vendor ID

0xE159

Device ID

0x0002

Device ID

0x0001

Sub-vendor ID

0x80

Sub-vendor ID

0x8080
0xC080

Sub-device ID

0x01

Sub-device ID

0x01

Sub-aux ID

0x40

Sub-aux ID

0x40

Содержание PEX-D24

Страница 1: ...the right to change this manual at any time without notice The information furnished by ICP DAS is believed to be accurate and reliable However no responsibility is assumed by ICP DAS for its use nor...

Страница 2: ...2 7 6 DB 24R DB 24RD Relay Board 22 2 7 7 DB 24PR DB 24POR DB 24C 23 2 7 8 Daughter Board Comparison Table 24 3 I O CONTROL REGISTER 25 3 1 HOW TO FIND THE I O ADDRESS 25 3 2 THE ASSIGNMENT OF I O ADD...

Страница 3: ...named as port A PA port B PB and port C PC respectively All ports are configured as inputs upon power up or reset In addition the PIO D56 D56U and PEX D56 provides additional 16 bit digital inputs an...

Страница 4: ...4 V max Logic 1 2 4 V min Output Capability Sink 64 mA 0 8 V Source 32 mA 2 0 V CON1 Sink 2 4 mA 0 8 V Source 0 8 mA 2 0 V CON3 Sink 64 mA 0 8 V Source 32 mA 2 0 V Response Speed 1 MHz General Bus Typ...

Страница 5: ...ty 5 V TTL Output Voltage Logic 0 0 4 V max Logic 1 2 4 V min Output Capability Sink 64 mA 0 8 V Source 32 mA 2 0 V CON1 Sink 2 4 mA 0 8 V Source 0 8 mA 2 0 V CON3 Sink 64 mA 0 8 V Source 32 mA 2 0 V...

Страница 6: ...B 24C and other OPTO 22 compatible daughter boards 4 interrupt sources PC0 PC1 PC2 PC3 No base address or IRQ switches to set 1 3 Product Check List The shipping package includes the following items O...

Страница 7: ...ion 2 1 Board Layout The board layout of the PIO D24 D56 series cards are shown below The board layout of the PEX D24 D56 cards are shown below Figure 2 1 Only for PIO D24U D56U PIO D56 D56U PIO D24 D...

Страница 8: ...first turned on or if a reset has been executed all ports are set as D I ports Each I O port is named as the following table and its location can be found in Figure 2 1 and 2 2 Table 2 1 Connector PA0...

Страница 9: ...Card ID is 0x0 For detail SW1 Card ID settings please refer to Table 2 3 Table 2 3 Default Settings OFF 1 ON 0 Card ID Hex 1 ID0 2 ID1 3 ID2 4 ID3 0x0 ON ON ON ON 0x1 OFF ON ON ON 0x2 ON OFF ON ON 0x...

Страница 10: ...11 DI 8 DI 6 DI 10 DI 12 DI 2 DI 4 DI 3 DI 0 2 DI 1 DO 15 20 18 16 14 12 10 8 6 4 17 15 13 11 9 7 5 3 1 19 DO 13 DO 14 GND Vcc GND 12V DO 7 DO 5 DO 9 DO 11 DO 8 DO 6 DO 10 DO 12 DO 2 DO 4 DO 3 DO 0 2...

Страница 11: ...Connector Pin Number Description Pin Number Description 1 N C 20 VCC 2 N C 21 GND 3 P1B7 22 P2C7 4 P1B6 23 P2C6 5 P1B5 24 P2C5 6 P1B4 25 P2C4 7 P1B3 26 P2C3 8 P1B2 27 P2C2 9 P1B1 28 P2C1 10 P1B0 29 P2...

Страница 12: ...2 DI1 3 DI2 4 DI3 5 DI4 6 DI5 7 DI6 8 DI7 9 DI8 10 DI9 11 DI10 12 DI11 13 DI12 14 DI13 15 DI14 16 DI15 17 GND 18 GND 19 Vcc 20 12 V Table 2 6 20 Pin flat cable headers of D O for PIO D56 U and PEX D5...

Страница 13: ...ports D O latch registers are all undefined Refer to Sec 2 5 for details The user must perform an initialization procedure before using these digital I O ports The recommended steps are as follows Ste...

Страница 14: ...ESET signal is in the Low state if means that all D I O operations are disabled When RESET signal is in the High state if means all D I O operations are enabled If the D I O is configured as a D I por...

Страница 15: ...PEX D56 CON2 Digital Input The digital input control architecture for the PIO D56 D56U and PEX D56 is demonstrated in Figure 2 3 When the RESET signal is in the Low state if means that all D I operat...

Страница 16: ...architecture for the PIO D56 D56U and PEX D56 is demonstrated in Figure 2 4 When the RESET signal is in the Low state if means that all D O operations are disabled When RESET signal is in the High sta...

Страница 17: ...If the initial state is High select the inverted setting for the interrupt signal source Section 3 3 6 If the initial state is Low select the non inverted setting for the interrupt signal source Sect...

Страница 18: ...5 If P2C2 is active service P2C2 and non inverted inverted as the P2C2 signal 6 If P2C3 is active service P2C3 and non inverted inverted the P2C3 signal 7 Save the new status to old status Limitation...

Страница 19: ...urpose daughter board for D sub 37 pin devices and is designed for easy wiring Figure 2 5 2 7 2 DN 37 and DN 50 The DN 37 is a general purpose daughter board for the DB 37 using DIN Rail Mounting The...

Страница 20: ...s designed for easy wiring The DB 8125 uses a single DB 37 header and two 20 pin flat cable headers Figure 2 7 2 7 4 ADP 20 PCI The ADP 20 PCI is an extender for the 20 pin header The one side of the...

Страница 21: ...nse DC signals from TTL levels up to 24 V or use the DB 24P to sense a wide range of AC signals This board can also be used to isolate the computer from large common mode voltage ground loops and tran...

Страница 22: ...control scheme is illustrated in Figure 2 10 below Table 2 7 gives a comparison and Table 2 8 gives a description of the daughter boards used in this application Table 2 8 DB 24R DB 24RD 50 pin flat c...

Страница 23: ...20 pin flat cable connector only uses 16 relays or 50 pin flat cable connector OPTO 22 compatible for DIO 24 series 24 enunciator LEDs for indicating the status of for each relay and the corresponding...

Страница 24: ...n DB 37 No No Yes DN 37 No No Yes ADP 37 PCI No Yes Yes ADP 50 PCI No Yes No DB 24P No Yes No DB 24PD No Yes Yes DB 16P8R No Yes Yes DB 24R No Yes No DB 24RD No Yes Yes DB 24C Yes Yes Yes DB 24PRD No...

Страница 25: ...ove Vendor ID 0xE159 Device ID 0x0001 Sub vendor ID 0x8080 0xC080 Sub device ID 0x01 Sub aux ID 0x40 For PIO D24 Rev 1 0 Rev 5 0 Rev 6 0 or above Vendor ID 0xE159 Vendor ID 0xE159 Device ID 0x0002 Dev...

Страница 26: ...following figure3 1 Details of how to identify the PIO series cards of ICPDAS data acquisition boards based on the Sub vendor Sub device and Sub Aux ID are given in Table 3 1 The PIO_PISO exe utility...

Страница 27: ...ISO A64 64 isolated D O Current sourcing 80 08 50 PISO P64 64 isolated D I 80 08 10 PISO P32C32 32 isolated D O Current sinking 32 isolated D I 80 08 20 PISO P32A32 32 isolated DO Current sourcing 32...

Страница 28: ...tify card_0 and card_1 are provided below The simplest way to identify which card is card_0 is to use the wSlotBus and wSlotDevice functions as follows Step 1 Remove all PIO D24 D56 or PEX D24 D56 ser...

Страница 29: ...this mapping will not be changed for any PIO PISO cards Therefore this information can be used to identify the specific PIO PISO card using the following steps Step 1 Using the wSlotBus and wSlotDevi...

Страница 30: ...le 3 3 Address Read Write Wbase 0 Reserved RESET control register Wbase 2 Reserved Aux control register Wbase 3 Aux data register Aux data register Wbase 5 Reserved INT mask control register Wbase 7 A...

Страница 31: ...b wBase 0 RESET Low all D I O operations are disable now 3 3 2 AUX Control Register Write wBase 2 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Aux7 Aux6 Aux5 Aux4 Aux3 Aux2 Aux1 Aux0 Aux 0 this Aux...

Страница 32: ...ad wBase 7 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Aux7 Aux6 Aux5 Aux4 Aux3 Aux2 Aux1 Aux0 Aux0 P2C0 Aux1 P2C1 Aux2 P2C2 Aux3 P2C3 Aux7 4 Aux ID Refer to the DEMO5 C file for more information...

Страница 33: ...Port0 1 as D I port Set Port2 as D O port 3 3 8 Interrupt Polarity Control Register Write wBase 0x2a Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 0 0 0 INV3 INV2 INV1 INV0 This register provides...

Страница 34: ...0 Val inportb wBase 0xc0 Read from port 0 outportb wBase 0xcc 0x07 Set Port0 Port2 as DO port outportb wBase 0xc0 i1 Write to Port0 outportb wBase 0xc4 i2 Write to Port1 outportb wBase 0xc8 i3 Write...

Страница 35: ...cally If it doesn t start automatically for some reason double click the AUTO32 EXE file in the NAPDOS folder on this CD Step 2 Click the item PCI Bus DAQ Card Step 3 Click the item UniDAQ Step 4 Clic...

Страница 36: ...ws NT 2K and 32 bit Windows XP 2003 Vista 7 The PIODIO DLL file will be copied into the C WINNT SYSTEM32 folder The NAPWNT SYS and PIO SYS files will be copied into the C WINNT SYSTEM32 DRIVERS folder...

Страница 37: ...or PEX D24 D56 series cards installed are correct on the computer as follows Step 1 Select Start Control Panel and then double click the System icon on Windows Step 2 Click the Hardware tab and then...

Страница 38: ...ver installation process the Install Shield software will register the correct kernel driver to the operating system and copy the DLL driver and demo programs to the correct position based on the driv...

Страница 39: ...LIB MSCPIO_H LIB MSC huge model library file BC for BC 3 xx or above BC LIB PIO H BC declaration file BC LIB BCPIO_L LIB BC large model library file BC LIB BCPIO_H LIB BC huge model library file Appen...

Страница 40: ...6 NotFoundBoard Can t detect the board on the system A2 2 PIO_DriverInit Description This function is used to detect all PIO PISO series card in the system and is implemented based on the PCI Plug Pl...

Страница 41: ...wSubAux wSlotBus wSlotDevice Parameters wBoardNo Input The board number wBase Output The base address of the board wIrq Output The IRQ number that the board using wSubVendor Output Sub Vendor ID wSubD...

Страница 42: ...o display a text string indicating the special Sub_ID This text string is the same as that defined in PIO H Syntax WORD ShowPIOPISO wSubVendor wSubDevice wSubAux Parameters wSubVendor Input SubVendor...

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