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4 - 4
4-5
OTHER CIRCUITS
4-5-1
TONE SQUELCH CIRCUIT (LOGIC UNIT)
A portion of the detected audio signals from the “DETO” line
are passed through the low-pass filter (IC13). The filtered
signal is then applied to the CPU (IC1, pin 4), and is com-
pared with the programmed tone signal. The CPU (IC1) out-
puts control signals to the AF mute and AF regulator circuits
to open the squelch when a matched tone signal is received.
The programmed subaudible tone signal is output from the
CPU (LOGIC unit; IC1, pin 9) directly when transmitting with
a tone.
LINE
HV
VCC
VHT2V
UHT2V
R3V
+3S
DESCRIPTION
The voltage from the external power supply or
attached battery pack.
The same voltage as the HV line (external power
supply or battery pack) which is controlled by the
power switch ([POWER] control).
Common 3 V converted from the VCC line by the
+3CPU regulator IC (LOGIC unit; IC2). The out-
put voltage is supplied to the +3C, R3 and T4
regulator circuits, etc.
Common 3 V converted from the VCC line by the
+3C regulator circuit (LOGIC unit; Q4, Q5, Q40
and D3) using the +3CPU regulator (LOGIC unit;
IC2).
3 V for receiver circuit converted from the VCC
line by the R3 regulator circuit (2F unit; Q4, Q5
and D402).
4 V for transmitter circuit converted from the
VCC line by the T4 regulator circuit (1F unit;
Q702, Q703 and D702). The T4 regulator circuit
is controlled by the CPU (LOGIC unit; IC1, pin
45) via T4 control regulator circuit (1F unit;
Q704).
4-4 POWER SUPPLY CIRCUITS
VOLTAGE LINE
• PLL circuit
Shift register
Prescaler
Phase
detector
Loop
filter
Programmable
counter
Programmable
divider
Ref. osc. X1
(15.2 MHz)
"2NDLO" signal to the
FM IF IC (2F unit)
Q304, Q305, D303, D304
V VCO
U VCO
Buffer
Buffer
Buffer
Q852
Q352
Q306
3
4
5
PSTB
IC851 (PLL IC)
CLK
DATA
17
16
13
19
Q301, Q302, D301, D302
DUAL VCO BOARD
Prescaler
Programmable
counter
Phase
detector
3
8
Loop
filter
"VTUNE" signal to VHF
RF circuit (2F unit)
2
Buffer
Q351
D351
D352
to VHF buffer amp.
circuit
to UHF buffer amp.
circuit