SECTION 4 CIRCUIT DESCRIPTION
4 - 1
4-1 RECEIVER CIRCUITS
4-1-1 ANTENNA SWITCHING CIRCUIT
(MAIN UNIT)
The antenna switching circuit functions as a low-pass filter
while receiving and as resonator circuit while transmitting.
The circuit does not allow transmit signals to enter receiver
circuits.
Received signals enter the MAIN unit from the antenna con-
nector and pass through the low-pass filter (L13, L14, L32,
C107–C111, C280). The signals are then applied to the RF
circuit via the antenna switching circuit (D15, L15, C197,
C198).
4-1-2 RF CIRCUIT (MAIN UNIT)
The RF circuit amplifies signals within the range of frequen-
cy coverage and filters out-of-band signals.
The signals from the antenna switching circuit pass through
a tunable bandpass filter (D19, L16, L17, L19, L20,
C199–C204, C206–C210) where the object signals are led
to the RF amplifier circuit (Q27).
The amplified signals at Q7 are applied to the 3-stage tun-
able bandpass filter (D20, L21, L22, L24, L25, C213–C218,
C220–C224) to suppress unwanted signals and improve the
selectivity. The signals are then applied to the 1st mixer cir-
cuit.
4-1-3 1ST MIXER AND 1ST IF CIRCUITS
(MAIN UNIT)
The 1st mixer circuit converts the received signal to a fixed
frequency of the 1st IF signal with a 1st LO (VCO output) fre-
quency. By changing the 1st LO frequency, only the desired
frequency will be passed through two crystal filters at the
next stage of the mixer.
The signals from the RF circuit are mixed with the VCO sig-
nals at the 1st mixer circuit (Q1) to produce a 21.7 MHz 1st
IF signal.
The 1st IF signal is applied to two crystal filters (FI1, FI2) to
suppress out-of-band signals and is then amplified at the IF
amplifier (Q2). The amplified signal is applied to the 2nd
mixer circuit (IC1).
4-1-4 2ND IF AND DEMODULATOR CIRCUITS
(MAIN UNIT)
The 2nd mixer circuit converts the 1st IF signal to a 2nd IF
signal. A double superheterodyne system (which converts
receive signals twice) improves the image rejection ratio and
obtains stable receiver gain.
The FM IF IC (IC1) contains the 2nd local oscillator, 2nd
mixer, limiter amplifier, quadrature detector, and noise
detector circuits, etc.
The 1st IF signal from Q2 is applied to the 2nd mixer section
of IC1 (pin 16), and is mixed with a 21.25 MHz 2nd LO sig-
nal generated at the PLL circuit using the reference fre-
quency (21.25 MHz) to produce a 450 kHz 2nd IF signal.
The 2nd IF signal from IC1 (pin 3) is passed through the
ceramic filter (FI3), where unwanted signals are sup-
pressed, and is then applied to the 2nd IF (limiter) amplifier
in IC1 (pin 5). The signal is applied to the FM detector sec-
tion in IC1 for demodulation into AF signals.
The FM detector circuit employs a quadrature detection
method (linear phase detection), which uses a ceramic dis-
criminator (X1) for phase delay to obtain a non-adjusting cir-
cuit. The detected signal from IC1 (pin 9) is applied to the AF
circuit.
Mixer
16
Limiter
amp.
2nd IF filter
450 kHz
PLL IC
IC2
X2
21.25 MHz
X1
(21.25 MHz)
RSSI
IC1 TA31136F
14
1st IF (21.7 MHz)
from the IF amplifier (Q2)
"SQL" signal to the CPU
(LOGIC board; IC1,pin 90)
11
10
9
8
7
5
3
AF signal "DET"
R5
Squelch level
adjustment pot
(R16)
2
17
16
Active
filter
FI3
Noise
detector
FM
detector
C25
C26
C24
C28
R20
R18
C27
R15
R21
C20
R19
R14
C266
• 2ND IF AND DEMODULATOR CIRCUITS
