ICC
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8.3 Allen Bradley CSP
8.3.1 Overview
Ethernet-enabled Allen-Bradley legacy PLCs (such as the PLC5E and SLC-5/05 series) use a protocol
called CSP (Client Server Protocol) to communicate over the Ethernet network. The flavor of CSP used
by these PLCs is also known as “PCCC” (Programmable Controller Communication Commands) and
“AB Ethernet”. The interface card supports CSP for direct connectivity to these PLCs.
If a connection timeout or socket-level error occurs, the driver will trigger a timeout event as described in
section 5.7.6.
8.3.2 Tag
Reference
Register contents are read from and written to the interface card via CSP by reference to an integer
“file/section number” and an “offset/element” within that file. Reading is performed via the CSP “PLC5
Read” (DF1 protocol typed read) service, and writing is performed via the CSP “PLC5 Write” (DF1
protocol typed write) service.
The formula to calculate which register is targeted in the interface card is provided in Equation 7.
(
)
offset
100
10
-
number
file
register
target
+
×
=
Equation 7
In Equation 7, “target register”
∈
[1…4417], “file number”
∈
[10…54] (which means N10…N54), and
“offset” is restricted only by the limitations of the programming software (but is a value of 4417 max).
Table 11 provides some examples of various combinations of file/section numbers and offsets/elements
which can be used to access inverter registers. Note that there are multiple different combinations of
file/section numbers and offsets/elements that will result in the same inverter register being accessed.
Table 11: CSP Target Register Examples
File/Section Number
Offset/Element
Start Target Register
N10 2 2
N12 62 262
N11 162 262
N27 98 1798
N20 798 1798
N54 17 4417
N10 4417 4417
In addition to providing access to the inverter registers in their “standard” numerical locations as
mentioned above, the registers can also be accessed in a special “assembly object” type format by
targeting integer file N60. What this means is that when N60 is targeted for reading, what is actually
returned by the interface card is the user-defined register data as ordered by the EtherNet/IP produced
register configuration array (refer to section 5.8.4). Similarly, when N60 is targeted for writing, the
written data is disseminated to the inverter’s registers according to the definition contained in the
EtherNet/IP consumed register configuration array. By appropriate configuration of the EtherNet/IP
consumed and produced register configuration arrays, therefore, bulk access to non-contiguous but
frequently-used inverter registers can be conveniently provided by performing only one read and/or write
instruction targeting file N60.
Because both the EtherNet/IP consumed and produced register configuration arrays are comprised of
32 register definitions, the targeted “offset/element” must be within the range of 0 to 31 inclusive. Refer
to Table 12 for some examples of N60 accesses.
