IBM x3850 X5, Руководство по внедрению

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Chapter 4. IBM System x3690 X5
127
4.5 MAX5
As introduced in 4.1.2, “IBM MAX5 memory expansion unit” on page 121, the MAX5 memory
expansion drawer is available for the x3690 X5. Certain standard models include the MAX5,
as described in 4.3, “Models” on page 124, and the MAX5 can also be ordered separately, as
listed in Table 4-3.
Table 4-3 Ordering information for the IBM MAX5 for System x
The eX5 chip set in the MAX5 is an IBM unique design that attaches to the QPI links as a
node controller, giving it direct access to all CPU bus transactions. It increases the number of
DIMMs supported in a system by a total of 32, and also adds another 16 channels of memory
bandwidth, boosting overall throughput. The MAX5 adds additional memory performance.
The eX5 chip connects directly through QPI links to both CPUs in the x3690 X5, and it
maintains a directory of each
CPU’s last-level cache. This directory allows the eX5 chip to
respond to memory requests prior to the end of a broadcast snoop cycle, thereby improving
performance. For more information about eX5 technology, see 2.1, “eX5 chip set” on page 16.
Figure 4-10 shows a diagram of the MAX5.
Figure 4-10 MAX5 block diagram
Part number Feature code Description
59Y6265 4199 IBM MAX5 for System x
60Y0332 4782 IBM 675W HE Redundant Power Supply
59Y6269 7481 IBM MAX5 to x3690 X5 Cable Kit (two cables)
SMI
links
DDR3
DIM
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Memory
buffer
Memory
buffer
Memory
buffer
Memory
buffer
SMI
links
Memory
buffer
Memory
buffer
Memory
buffer
Memory
buffer
DDR3
DIM
M
s
(Tw
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External connectors
QPI QPI QPI QPI EXA EXA EXA
IBM EXA
chip
QPI QPI