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S524C20D11/20D21/80D41/80D81 SERIAL EEPROM
Start/Stop
Logic
Slave Adress
Comparator
Word Address
Pointer
HV Generation
Timing Control
Column Decoder
Row
decoder
Data Register
Dout and ACk
Control Logic
EEPROM
Cell Array
128 x 8 bits
256 x 8 bits
512 x 8 bits
1024 x 8 bits
SDA
SCL
WP
A0
A1
A2
BLOCK DIAGRAM
S524C20D11/20D21/
80D41/80D81
Vcc
A0
A1
A2
Vss
Wp SCL SDA
PIN CONFIGURATION
PIN FUNCTION
NOTE: See following page for diagrams of pin circuit types 1,2 and 3.
Name
A0, A1, A2
Vss
Input
-
1
3
2
1
-
-
Input pins for device address selection. To configure a device adress,
these pins should be connected to the Vcc of Vss of the device.
SDA
I/O
SCL
Input
Bi-directionl data pin for the I
2
C-bus serial data interface. Schmitt
trigger input and open-drain output. An external pull-up resistor must
be connected to Vcc. Typical values for this pull-up resistor are 4.7k
Ω
(100kHz)and 1k
Ω
(400kHz)
.
SDA
I/O
Input pin for hardware write protection control. If you tie this pin to Vcc,
the write function is disabled to protect previously written data in the
entire memory; if you tie it to Vss, the write function is enabled.
Ground pin.
Schmitt trigger input pin for serial clock input.
Vcc
-
Single power supply.
Type
Circuit
Type
Description
Содержание T860 9494-HB0
Страница 20: ... 20 3 POWER BOARD Component Side 4 POWER BOARD Solder Side ...
Страница 22: ... 22 EXPLODED VIEW 1 15 16 11 10 a a c b 6 5 7 2 A 8 9 13 12 3 14 4 ...
Страница 35: ...SCHEMATIC DIAGRAM 32 1 GM5020 ...
Страница 36: ... 33 2 MEMORY ...
Страница 37: ... 34 3 LVDS ...
Страница 38: ... 35 4 MICOM ...
Страница 39: ... 36 5 DC DC ...
Страница 40: ... 37 6 CONNECTOR ...
Страница 41: ... 38 7 INPUT SWITCHING ...
Страница 42: ... 39 8 CONTROL KEY ...
Страница 43: ... 40 9 POWER ...
Страница 44: ...Dec 2001 Printed in Korea P NO 3828TSO049A ...