IBM PC 300GL Types 6275, Информационное руководство

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Your computer stores various system programs and data in flash memory so that they can be
updated whenever enhancements are made. Stored in flash memory are:
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Basic input/output system (BIOS)
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Power-on self-test (POST)
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Configuration/Setup Utility program
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Vital product data (VPD)
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Processor update code
Cache Memory
Microprocessors can be so fast that main memory cannot respond to read and write requests
as quickly as the microprocessor can send them. In some cases, main memory imposes one
or more wait states on the microprocessor when it reads data from or writes data to
memory.
A wait state is a period of time (one microprocessor clock cycle) during which the
microprocessor suspends processing and waits for memory to respond to a read or write
operation (a memory I/O operation). The speed of a memory I/O operation is measured in
microprocessor clock cycles, so the microprocessor clock speed determines the minimum
time required for a memory I/O operation. Wait states cause the computer to operate less
efficiently than if the microprocessor were able to continue processing data during memory
I/O operations.
A method of reducing the need for wait states is by using cache memory, which improves
system performance by temporarily storing frequently used data and instructions in a cache.
A cache is a buffer between the microprocessor and main memory.
For information about the cache memory in your computer, view the System Summary
screen displayed by the Configuration/Setup Utility Program.
Level-1 Cache
Level-1 (L1) cache is determined by the type of microprocessor installed in your computer.
The L1 cache for the Intel microprocessors contain high-speed memory, known as static
random access memory (SRAM), that can respond to memory I/O operations without
imposing wait states on the microprocessor.
L1 cache memory is used to store the information most often used by the microprocessor.
This allows a microprocessor to handle information faster than if it had to use the system
memory each time it needed new information. During processing, the cache controller
copies other data and instructions into the cache, replacing data and instructions that are no
longer needed.
Performance is improved each time the microprocessor finds what it needs in the cache (a
cache hit). If it does not find what it needs (a cache miss), the cache controller must locate the
data or instruction in memory and copy it into the cache, while one or more wait states are
4 Microprocessors and Memory