IBM 6589 - PC 365 - 32 MB RAM, Руководство пользователя

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Chapter 2. System Board Features
PCI-to-ISA Bridge
The PIIX3 chip provides the bridge between the peripheral component interconnect (PCI) and industry
standard architecture (ISA) buses. The chip is used to convert PCI bus cycles to ISA bus cycles.
The PCI bus is compliant with PCI Local Bus Specification 2.1. The PCI bus runs synchronously to the
host bus and is driven at a frequency of 30 or 33 MHz, depending on the speed of the microprocessor bus
(60 MHz or 66 MHz). The ISA bus operates at speeds of 7.5 MHz or 8.33 MHz (one-quarter of the PCI
bus speed).
For information on the expansion connectors to the PCI and ISA buses, see “Riser Card” on page 13.
The following table shows the system resources used for the PCI-to-ISA bridge.
Note: When the computer is started, the resource assignments are subject to change during the
power-on self-test (POST).
The chip that provides the PCI-to-ISA bridge also includes all the subsystems of the ISA bus. These
ISA-compatible subsystems are:
Ÿ
Two cascaded 82C59 interrupt controllers
Ÿ
Two 82C37 DMA controllers with four 8-bit and three 16-bit channels
Ÿ
Three counters equivalent to a 82C54 programmable interval timer
Ÿ
Power management features
Table 1. System Resource Assignments for PCI-to-ISA Bridge
System Resource Assignment
ROM None
RAM None
I/O (hex) 00-0F, 20-43, 61, 70, 80-8F, 92, A0-BF, C0-DE, EE-F1, F4-F5
IRQ NMI, 0, 2
DMA None
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Technical Information Manual