IBASE Technology MI945P, Руководство пользователя

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BIOS SETUP
32 MI945P User’s Manual
Advanced Chipset Features
This Setup menu controls the configuration of the chipset.
Phoenix - AwardBIOS CMOS Setup Utility
Advanced Chipset Features
System BIOS Cacheable Enabled ITEM HELP
Memory Hole at 15M-16M Disabled
PCI Express Root Port Func Press Enter
VT-d Disabled
** VGA Setting **
PEG/On Chip VGA Control Auto
PEG Force X1 Disabled
On-Chip Frame Buffer Size 64MB
DVMT Mode Enabled
Total GFX Memory 128MB
PAVP Mode PAVP-Lite
Boot Display CRT
SDVO Device Setting None
SDVO LVDS Protocol 1CH SPWG, 18bit
SDVO Panel Number 1024x768
Active LVDS Device No LVDS
Integrated LVDS Protocol 18 bit
Panel Scaling Auto
Panel Number 1024x768 SC/DC
TV1 Standard Type VBIOS Default
TV2 Standard Type VBIOS Default
BIA Control Auto
System BIOS Cacheable
The setting of Enabled allows caching of the system BIOS ROM at
F000h-FFFFFh, resulting in better system performance. However, if any
program writes to this memory area, a system error may result.
Memory Hole At 15M-16M
In order to improve performance, certain space in memory can be
reserved for ISA cards. This memory must be mapped into the memory
space below 16 MB. The choices are
Enabled and Disabled .
VT-d
Virtualization solutions allow multiple operating systems and
applications to run in independent partitions all on a single computer.
Using virtualization capabilities, one physical computer system can
function as multiple "virtual" systems.