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2.4. JTAG Connector
This connector is used to configure the FPGA and program the configuration device
in-system. Pin assignment is as follows.
CN1
Signal Name
Direction
Pin No.
GND
I/O 1
TCK IN 2
TDO OUT 3
TMS IN 4
VCC (3.3V)
OUT (POW)
5
TDI IN 6
GND
I/O 7
You can use Xilinx download cable.
Please pay attention not to attach cables in reverse.
Notice
1
7
5
XCM-011 Series v1.0