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Honeywell International Inc.
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KT73_TxMod_Theory.doc
the darlingtons is decreased, and the collector voltages for the RF transistors stay at 50
VDC.
1.3
Collector Modulator
The collector modulator is used to increase the fall time of the RF output pulse. The final
RF amplifier is powered by a series of 50 V collector voltage pulses that correspond to
MOD_TRIG pulses. The collector voltage starts with the rising edge of each
MOD_TRIG pulse and end when the gate of Q10 discharges to below its threshold level.
MOD_TRIG is inverted by I1 and fed to Q11 through C24. I1 also provides isolation
between MOD_TRIG and the 65 V line. Transistor Q11 is a medium power p-channel
FET that drives the high current driver Q10, IRF540. Integrated circuit I1 pulls one end
of C24 from 12 V to ground, causing a 12 V drop in the gate to source voltage of Q11.
The threshold voltage, V
GS
of Q11 in negative 2-4 volts, so the falling on 12 V pulse
drives Q11 into saturation. The result is a 65 pulse on R28 and R26 that turns on Q10,
which then delivers a 50 V pulse to the collector of the final amplifier. R28 and the
capacitance of Q10 from gate to source control the rate, at which the gate voltage of Q10
is discharged, effectively slowing down the fall time of the 50 volt pulse that appears on
the collector of the final amplifier.
1.4
Emitter Modulator
Emitter modulator is a circuit that turns on the power oscillator, during the interval that
the MOD_TRIG is high. When running the emitter modulator unloaded, the output is a
negative 12 V pulse that occurs while MOD_TRIG is high. As in the collector modulator,
I1 inverts the MOD_TRIG pulse and drives Q4 with a negative going pulse. Q4 is a small
signal p-channel FET, which then saturates whenever MOD_TRIG is high. This results in
a positive going pulse, which turns on Q6, a high current driver for the power oscillator.
Transistor Q5 provides an active turnoff for Q6. The turnoff operation follows this
sequence. When Q4 and Q6 are turned on, the gate and the source of Q5 are essentially
the same voltage. Since Q5 is a p-channel FET, it is off when Q4 and Q6 are turned on.
When the MOD_TRIG pulse goes low, V
GS
for Q4 becomes zero volts and Q4 turns off.
Simultaneously, V
G
for Q5 goes to –12 volts, but V
S
due to CR2 being reverse biased and
the charge stored on C10, remains at +12 volts. Therefore, V
GS
for Q5 right after the end
the MOD_TRIG pulse is enough to turn Q5 on very hard. The charge on the gate of Q6 is
the returned through Q5 and R11 to the –12 V supply. R 11 is an adjustable resistor that
varies the discharge rate of Q5, which is used primarily to the RF output pulse width. Q5
stays on until it V
GS
is less than two volts and CR5 prevents the gate of Q3006 from,
going below –12 volts.