8
3 Operation
3.1 Commands and Format
3.1.1 Initialization
The IPT piezo-resistive pressure sensing die contains two bridge circuits; one for pressure, one for
temperature. The IPT provides two serial (SPI-compatible) Analog-to-Digital Converters (ADCs), one
for each of these data channels. The pressure channel uses a 24-bit ADC from
Analog Devices
, P/N
AD7799. The temperature channel uses a 16-bit ADC from Analog Devices, P/N AD7790. After
applying power to the IPT and before obtaining data, each data channel needs to be initialized.
As per the manufacturer’s data sheets, the SPI serial clock for each ADC should be ≤ 5 MHz. During
reads and writes to the ADC’s as detailed below, the appropriate chip-select line must be brought low
(CS_P or CS_T).
3.1.1.1 Pressure Channel
The pressure channel ADC is controlled and configured via a number of on-chip registers. ALL
communication to the pressure channel ADC starts with a write operation to the 8-bit write-only
communication register.
Initializing the pressure channel ADC requires writing data to a sequence of four registers; the
Communication register, the Mode register, the Communication register, and the Configuration
register.
3.1.1.1.1 Communication Register
Sending
0x10
to the Communication register tells the ADC the following write will be to
the 16-bit Configuration register.
3.1.1.1.2 Configuration Register
Sending
0x1020
to the Configuration register sets the ADC’s gain and buffering.
3.1.1.1.3 Communication Register
Sending
0x08
to the Communication register tells the ADC the following write will be to
the 16-bit Mode register.
3.1.1.1.4 Mode Register
Sending
0x3001
to the Mode register places the ADC into a single conversion mode
and sets the update rate, f
ADC
to 470 Hz.
From the AD7799 manufacturer’s datasheet:
“When single-conversion mode is selected, the ADC powers up and performs a single
conversion. The oscillator requires 1 ms to power up and settle. The ADC then performs
the conversion, which takes a time of 2/f
ADC
[4.26 ms]
. The conversion result is placed in
the data register, RDY goes low, and the ADC returns to power-down mode. The
conversion remains in the data register and RDY remains active (low) until the data is
read or another conversion is performed.”