HT66FV1x0 Integrated Audio Amplifier Application Guideline
AN0486EN V1.10
6 / 16
June 8, 2021
PLAC Register
Bit
7
6
5
4
3
2
1
0
Name
–
–
–
–
–
–
PAEN
DAEN
R/W
–
–
–
–
–
–
R/W
R/W
POR
–
–
–
–
–
–
0
0
Bit7~2
Unimplemented, read as “0”
Bit1
PAEN
: Power amplifier enable control
0: Disable
1: Enable
Bit0
DAEN
: 16-bit D/A converter enable control
0: Disable
1: Enable
Note that the 16-bit D/A converter and power amplifier will all be disabled when the MCU enters
the IDLE/SLEEP mode.
PLADL Register
Bit
7
6
5
4
3
2
1
0
Name
P_D7
P_D6
P_D5
P_D4
P_D3
P_D2
P_D1
P_D0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
POR
0
0
0
0
0
0
0
0
Bit7~0
P_D7~P_D0
: Paly data low byte register bit7~bit0
This register is used to store the 16-bit play data low byte.
PLADH Register
Bit
7
6
5
4
3
2
1
0
Name
P_D15
P_D14
P_D13
P_D12
P_D11
P_D10
P_D9
P_D8
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
POR
0
0
0
0
0
0
0
0
Bit7~0
P_D15~P_D8
: Paly data high byte register bit7~bit0
This register is used to store the 16-bit play data high byte. Note that the low byte play data register
should first be modified followed by the high byte play data register being written if the 16-bit play
data is necessary to be updated.
