Section 4 Basic Timing
4.1 Overview
The CPU is driven by a clock, denoted by the symbol ø. One cycle of the clock is referred to as a
“state.” The memory cycle or bus cycle consists of two or three states. Different methods are used
to access on-chip memory, on-chip supporting modules, and external devices. Refer to the relevant
microcontroller hardware manual for details.
4.2 On-Chip Memory (RAM, ROM)
For high-speed processing, on-chip memory is accessed in two states. The data bus is 16 bits
wide, permitting both byte and word access. Figure 4-1 shows the on-chip memory access cycle.
Figure 4-2 shows the pin states.
Figure 4-1 On-Chip Memory Access Cycle
Internal address bus
Internal read signal
Internal data bus
(read access)
Internal write signal
Internal data bus
(write access)
ø
Bus cycle
T
1
state
T
2
state
Address
Read data
Write data
245
