Hitachi hard disk drive specifications
174
11.26
Read Stream PIO (2Bh)
Command Block Output Registers
Command Block Input Registers
Register
7
6
5
4
3
2
1
0
Register
7
6
5
4
3
2
1
0
Data Low
-
-
-
-
-
-
-
-
Data Low
-
-
-
-
-
-
-
-
Data High
-
-
-
-
-
-
-
-
Data High
-
-
-
-
-
-
-
-
Feature
Current
V
V
V
V
-
V
V
V
Error
…See Below…
Previous
V
V
V
V
V
V
V
V
Sector Count
Current
V
V
V
V
V
V
V
V
Sector Count
HOB=0
-
-
-
-
-
-
-
-
Previous
V
V
V
V
V
V
V
V
HOB=1
-
-
-
-
-
-
-
-
Sector
Number
Current
V
V
V
V
V
V
V
V
Sector
Number
HOB=0
V
V
V
V
V
V
V
V
Previous
V
V
V
V
V
V
V
V
HOB=1
V
V
V
V
V
V
V
V
Cylinder Low
Current
V
V
V
V
V
V
V
V
Cylinder Low
HOB=0
V
V
V
V
V
V
V
V
Previous
V
V
V
V
V
V
V
V
HOB=1
V
V
V
V
V
V
V
V
Cylinder High
Current
V
V
V
V
V
V
V
V
Cylinder High
HOB=0
V
V
V
V
V
V
V
V
Previous
V
V
V
V
V
V
V
V
HOB=1
V
V
V
V
V
V
V
V
Device/Head
1
1
1
D
-
-
-
-
Device/Head
-
-
-
-
-
-
-
-
Command
0
0
1
0
1
0
1
1
Status
…See Below…
Error Register
Status Register
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
CRC
UNC
0
IDN
0
ABT
T0N
CCTO
BSY
RDY
SE
DWE
DRQ
COR
IDX
ERR
V
V
0
V
0
V
0
V
0
V
V
0
-
0
-
V
Table 120 Read Stream PIO Command (2Bh)
The Read Stream DMA command reads one to 65536 sectors as specified in the Sector Count register. A
value of 0000h in the Sector Count register requests 65536 sectors.
The RC bit indicates that the drive operate in a continuous read mode for the Read Stream command. When RC
is cleared to zero the drive shall operate in normal Streaming read mode.
When the Read Continuous mode is enabled, the device shall transfer data of the requested length without
setting the ERR bit. The SE bit shall be set to one if the data transferred includes errors. The data may be
erroneous in this case.
If the Read Continuous bit is set to one, the device shall not stop execution of the command due to errors. If
the RC bit is set to one and errors occur in reading or transfer of the data, the device shall continue to transfer
the amount of data requested and then provide ending status with the BSY bit cleared to zero, the SE bit set to
one, the ERR bit cleared to zero, and the type of error, ICRC,UNC,IDNF, or ABRT, reported in the error log. If
the RC bit is set to one and the Command Completion Time Limit expires, the device shall stop execution of the
command and provide ending status with BSY bit cleared to zero, the SE bit set to one, the ERR bit cleared to
zero, and report the fact that the Command Completion Time Limit expired by setting the CCTO bit in the error
log to one, In all cases, the device shall attempt to transfer the amount of data requested within the Command
Completion Time Limit event if some data transferred is in error.
Содержание Deskstar 7K3000 HDS723015BLA642
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