Accessories
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NXHX 51-ETM | Development Board
DOC120606HW05EN | Revision 5 | English | 2013-10 | Released | Public
© Hilscher, 2012 - 2013
X3 Serial Dual-Port Memory Interface
Pin
Signal
Pin
Signal
1 SPM_SIRQ#
7 SPM_CS#
2 +3.3
V
8 GND
3 SPM_DIRQ#
9 SPM_MOSI
4 GND
10 GND
5 SPM_CLK
11 SPM_MISO
6 GND
12 GND
The settings of the S1 host mode switch (see position in the figure
above) on the NXHX-PHY module are read by the Second Stage
Bootloader during boot:
SW
Setting
Function
ON SPM
mode
S1.1
OFF DPM
mode
ON
16 bit DPM mode
S1.2
OFF
8 bit DPM mode
Note that a switch for configuring the host mode is also implemented on the
NXHX 51-ETM development board, i. e. the S2 switch, which is described
in the
Configuration Host Mode - Switch (S2)
The settings of the S1 switch on the NXHX-PHY module and the settings of
the S2 switch on the development board can be combined according to the
following table:
S1 Switch on NXHX-PHY
S2 Switch on NXHX 51-ETM
SW
Setting
SW
Setting
Description
OFF OFF
DPM mode
Do not use this setting, because the
NXHX-PHY can not use the DPM on
the NXHX 51-ETM board.
ON OFF
OFF ON
SPM mode
S1.1
ON
S2.1
ON
Do not use this setting, because two
pull-down resistors will be used at the
same time, leading to malfunction.
OFF OFF
8 bit DPM mode
(not relevant, because the NXHX-PHY
can not use the DPM on the NXHX 51-
ETM board)
ON OFF
OFF ON
16 bit DPM mode
(not relevant, because the NXHX-PHY
can not use the DPM on the NXHX 51-
ETM board)
S1.2
ON
S2.2
ON
Do not use this combination, because
two pull-down resistors will be used at
the same time, leading to malfunction.
Table 36: Combination of Host Mode Switches
For the setting of the X10 jumper on the NXHX 51-ETM required for
operating the NXHX-PHY at the host interface see
for NXHX-PHY Board at Host Interface X3
on page 15.