Package, Pinning, Pad Cells
23/56
netX 50 to netX 51/52 | Migration Guide
DOC120109MG05EN | Revision 5 | English | 2013-08 | Released | Public
2012-2013
Pin
Pad
In
Out
Signal
Group
Description
C17
IOU9
IO
MII_RXD2
MII
MII Data 14
B17
IOU9
IO
MII_RXD3
MII
MII Data 15
B16
IOU9
IO
MII_RXDV
MII
MII Byte Enable 3
A02
IOU9
IO
MII_RXCLK
MII
MII Receive Clock
A04
IOU9
IO
MII_RXER
MII
MII Receive Error
C11
IOU9
IO
MII_TXD0
MII
MII Transmit Data 0
A11
IOU9
IO
MII_TXD1
MII
MII Transmit Data 1
C10
IOU9
IO
MII_TXD2
MII
MII Transmit Data 2
A09
IOU9
IO
MII_TXD3
MII
MII Transmit Data 3
A08 IOU9
IO MII_TXEN
MII
MII
Transmit
Enable
F17 IOU9
IO MII_TXER
MII
MII
Transmit
Error
C12 IOU9
IO MII_TXCLK
MII
MII
Transmit
Clock
G18 IOU9
IO MII_COL
MII
MII
Transmit
G16 IOU9
IO MII_CRS
MII
MII
D18
IOU9
IO
MII_MDIO
MII
MII Data 11
C18
IOU9
IO
MII_MDC
MII
MII Data 12
B15 IOU9
IO PIO52
PIO
Peripheral
IO
Table 8: Alternative Function at Host Interface