Host Interface
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COM-C | Communication Module
DOC021001DG12EN | Revision 12 | English | 2011-06 | Released | Public
© Hilscher, 2002-2011
3.2
COM-CA-SCEB Pinning of the System Bus Connector X1
Pin
Signal
Symbol
Type
1
Word Interface, active low
WIF#
GND if D8 - D15 is available (16 bit),
left unconnected if not (8 bit)
2
Bus high enable, active low
BHE#
LVTTL Input
3
Data line 15
D15
LVTTL Input / Output
4
Data line 14
D14
LVTTL Input / Output
5
Data line 13
D13
LVTTL Input / Output
6
Data line 12
D12
LVTTL Input / Output
7
Data line 11
D11
LVTTL Input / Output
8
Data line 10
D10
LVTTL Input / Output
9
Data line 9
D9
LVTTL Input / Output
10
Data line 8
D8
LVTTL Input / Output
11 Ground
GND
12
Power Supply
+3.3 V
13
reserved for future - don't connect
-
14
reserved for future - don't connect
-
15
reserved for future - don't connect
-
16
reserved for future - don't connect
-
17
Interrupt, active low
INT1#
LVTTL Output
18
reserved for future - don't connect
-
19
reserved for future - don't connect
-
20
reserved for future - don't connect
-
21
Reset, active low
RES#
LVTTL Input; 10 k … 30 k pull up
22
Busy, active low
BUSY#
LVTTL Output
23
Interrupt, active low
INT0#
LVTTL Output
24
Read, active low
RD#
LVTTL Input
25
Write, active low
WR#
LVTTL Input
26
Chip select, active low
CS#
LVTTL Input
27
Address line 13 (reserved for future use)
A13
LVTTL Input
28
Address line 12
A12
LVTTL Input
29
Address line 11
A11
LVTTL Input
30
Address line 10
A10
LVTTL Input
31
Address line 9
A9
LVTTL Input
32
Address line 8
A8
LVTTL Input
33
Address line 7
A7
LVTTL Input
34
Address line 6
A6
LVTTL Input
35
Address line 5
A5
LVTTL Input
36
Address line 4
A4
LVTTL Input
37
Address line 3
A3
LVTTL Input
38
Address line 2
A2
LVTTL Input
39
Address line 1
A1
LVTTL Input
40
Address line 0
A0
LVTTL Input
Table 10: COM-CA-SCEB Pinning of the System Bus Connector X1 (Part 1)
Continued on next page.