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HTE029A1

www.heltec.cn

／

Input/Output Terminals

6.1

Pin out List

Pin #

Single

Description

Remark

No connection and do not connect with other NC pins

Keep Open

GDR

N-Channel MOSFET Gate Drive Control

RESE

Current Sense Input for the Control Loop

VGL

Negative Gate driving voltage

VGH

Positive Gate driving voltage

TSCL

I2C Interface to digital temperature sensor Clock pin

TSDA

I2C Interface to digital temperature sensor Date pin

BS1

Bus selection pin

Note 6-5

BUSY

Busy state output pin

Note 6-4

RES #

Reset

Note 6-3

D/C #

Data /Command control pin

Note 6-2

CS #

Chip Select input pin

Note 6-1

serial clock pin (SPI)

serial data pin (SPI)

VDDIO

Power for interface logic pins

VCI

Power Supply pin for the chip

VSS

Ground

VDD

Core logic power pin

VPP

Power Supply for OTP Programming

VSH

Positive Source driving voltage

PREVGH

Power Supply pin for VGH and VSH

VSL

Negative Source driving voltage

PREVGL

Power Supply pin for VCOM, VGL and VSL

VCOM

VCOM driving voltage

Содержание HTE029A1

Страница 1: ...TECHNICAL SPECIFICATION Model Number HTE029A1 Description Screen Size 2 9 Color Black and White Display Resolution 296 128 Chengdu Heltec Automation technology CO LTD ...

Страница 2: ...eltec cn 2 30 Version Content Date Producer 1 0 New release 2015 01 10 2 0 Modify Reference Circuit 2017 03 02 3 0 Updating 2017 06 22 3 1 Modify Reference Circuit 2017 08 04 3 2 Modify Mechanical Drawing 2017 08 11 ...

Страница 3: ...ratureSensoroperation 10 7 CommandTable 11 8 ReferenceCircuit 16 9 MAXIMUMRATINGS 18 10 DC CHARACTERISTICS 18 11 Serial PeripheralInterfaceTiming 19 12 PowerConsumption 19 13 TypicalOperating Sequence 20 13 1 NormalOperationFlow 20 13 2 Reference ProgramCode 21 14 Opticalcharacteristics 22 14 1 Specifications 22 14 2 Definition ofcontrast ratio 23 14 3 ReflectionRatio 23 15 Handling Safety andEnvi...

Страница 4: ...Pure reflective mode Bi stable display Commercial temperature range Landscape portrait modes Hard coat antiglare displaysurface Ultra Low current deep sleepmode On chip display RAM Waveform stored in On chipOTP Serial peripheral interface available On chip oscillator On chip booster and regulator control for generating VCOM Gate and Source drivingvoltage I2C signal master interface to read externa...

Страница 5: ... VDDIO VCI VSS VDD VPP VSH PREVGH VSL PREVGL VCOM 1 DISPALY MODE 2 9 ARREY FOR EPD 2 DRIVE IC IL3820 3 RESOLUTION 128gate X 296source 4 pixel pitch 0 226mm X 0 227mm 5 Unspecified Tolerance 0 20 6 Material conform to the ROHS standard CHK APP P N PROJECTION HTE029A1 5 Mechanical Drawing of EPD module TFT OD 79 00 0 1 TFT AA 66 85 0 1 3 00 3 50 0 1 15 32 14 10 6 00 3 20 www heltec cn 5 30 A1 Change...

Страница 6: ...igital temperature sensor Date pin 8 BS1 Bus selection pin Note 6 5 9 BUSY Busy state output pin Note 6 4 10 RES Reset Note 6 3 11 D C Data Command control pin Note 6 2 12 CS Chip Select input pin Note 6 1 13 D0 serial clock pin SPI 14 D1 serial data pin SPI 15 VDDIO Power for interface logic pins 16 VCI Power Supply pin for the chip 17 VSS Ground 18 VDD Core logic power pin 19 VPP Power Supply fo...

Страница 7: ...ote 6 4 This pin BUSY is Busy state output pin When Busy is high the operation of chip should not be interrupted and any commands should not be issued to the module The driver IC will put Busy pin high when the driver IC is working such as Outputting display waveform or Communicating with digital temperature sensor Note 6 5 This pin BS1 is for 3 line SPI or 4 line SPI selection When it is Low 4 li...

Страница 8: ... pin D C pin SCLK pin Write command L L Write data L H Note stands for rising edge of signal SDIN is shifted into an 8 bit shift register in the order of D7 D6 D0 The data byte in the shift register is written to the Graphic Display Data RAM RAM or command register in the same clock Under serial mode only write operations are allowed Figure 6 1 Write procedure in 4 wire Serial Peripheral Interface...

Страница 9: ... C bit D7 to D0 bit The D C bit first bit of the sequential data will determine the following data byte in the shift register is written to the Display Data RAM D C bit 1 or the command register D C bit 0 Under serial mode only write operations are allowed Table 2 Control pins of 3 wire Serial Peripheral interface Function CS pin D C pin SCLK pin Write command L Tie LOW Write data L Tie LOW Note s...

Страница 10: ...he temperature value then converted to hex format then use the spi interface send command 0x1A and the temperature value into the module The temperature value how to converted to hex as thefollow 1 When the Temperature value MSByte bit D11 0 the temperature is positive and value DegC Temperature value 16 2 When the Temperature value MSByte bit D11 1 the temperature is negative and value DegC 2 s c...

Страница 11: ... 1 0 0 0 1 Data Entry mode setting Define data entry sequence A 1 0 ID 1 0 Address automatic increment decrement setting The setting of incrementing or decrementing of the address counter can be made independently in each upper and lower bit of the address 00 Y decrement X decrement 01 Y decrement X increment 10 Y increment X decrement 11 Y increment X increment POR A 2 AM Set the direction in whi...

Страница 12: ...ate Display Update Sequence The Display Update Sequence Option is located at R22h User should not interrupt this operation to avoid corruption of panel images 0 0 21 0 0 1 0 0 0 0 1 Display Update Control 1 Option for Display Update Bypass Option used for Pattern Display which is used for display the RAM content into the Display OLD RAM Bypass option A 7 A 7 1 Enable bypass A 7 0 Disable bypass PO...

Страница 13: ...le Clock Signal then Enable CP CLKEN 1 CPEN 1 C0 To INITIAL DISPLAY PATTEN DISPLAY 0C To INITIAL DISPLAY 08 To DISPLAY PATTEN 04 To Disable CP then Disable Clock Signal CLKEN 1 CPEN 1 03 To Disable Clock Signal CLKEN 1 01 Remark CLKEN 1 If CLS VDDIO then Enable OSC If CLS VSS then Enable External Clock CLKEN 0 If CLS VDDIO then Disable OSC AND INTERNAL CLOCK Signal VSS 0 0 24 0 0 1 0 0 1 0 0 Write...

Страница 14: ...A0 0 0 3C 0 0 1 1 1 1 0 0 Border Waveform Control Select border waveform for VBD A 7 Follow Source at Initial Update Display A 7 0 POR A 7 1 Follow Source at Initial Update Display for VBD A 6 0 setting are being overridden at Initial Display STAGE A 6 Select GS Transition Fix Level for VBD A 6 0 Select GS Transition A 3 0 for VBD A 6 1 Select FIX levelSetting A 5 4 for VBD POR A 5 4 Fix Level Set...

Страница 15: ... 8 0 YSA 8 0 YStart POR 000h B 8 0 YEA 8 0 YEnd POR 13Fh 0 1 A7 A6 A5 A4 A3 A2 A1 A0 0 1 0 0 0 0 0 0 0 A8 0 1 B7 B6 B5 B4 B3 B2 B1 B0 0 1 0 0 0 0 0 0 0 B8 0 0 4E 0 1 0 0 1 1 1 0 Set RAM X address counter Make initial settings for the RAM X address in the address counter AC A 4 0 XAD 4 0 POR is 00h 0 1 0 0 0 A4 A3 A2 A1 A0 0 0 4F 0 1 0 0 1 1 1 1 Set RAM Y address counter Make initial settings for t...

Страница 16: ...www heltec cn 16 30 HTE029A1 8 Reference Circuit Figure 8 1 ...

Страница 17: ...www heltec cn 17 30 HTE029A1 Figure 8 2 ...

Страница 18: ...IN D0 SCLK CS D C RES BS1 0 8VDDIO V VIL Low level input voltage 0 2VDDI O V VOH High level output voltage IOH 100uA BUSY TSDA TSCL 0 9VDDIO V VOL Low level output voltage IOL 100uA 0 1VDDI O V Iupdate Module operating current 6 5 mA Isleep Deep sleep mode VCI 3 3V 0 6 1 uA The Typical power consumption is measured using associated 25 waveform with following pattern transition from horizontal scan...

Страница 19: ...me 120 ns tCSH Chip Select Hold Time 60 ns tDSW Write Data Setup Time 50 ns tDHW Write Data Hold Time 15 ns tCLKL Clock Low Time 100 ns tCLKH Clock High Time 100 ns tR Rise Time 20 80 15 ns tF Fall Time 20 80 15 ns D C CS SCLK D 0 SDIN D 1 CS SCLK D0 SDIN D1 12 Power Consumption Parameter Symbol Conditions TYP Max Unit Remark Panel power consumption during update 25 13 mAs Deep sleep mode 25 0 6 u...

Страница 20: ...ad a waveform from OTP to LUT Enter into deep sleep mode Power down Confidential 13 Typical Operating Sequence 13 1 Normal Operation Flow Power On Apply VCI Turn off oscillator clock and DC DC regulator Turn on oscillator clock and DC DC regulator to generate the driving voltage Define the display size and the RAM address Reset the EPD driver IC ...

Страница 21: ... 0x3b 0x08 Power On Apply VCI Init all the pin D C CS D0 D1 RES to high level 3 wire spi communication mode 4 wire spi communication mode Image data download SPI 0x24 4736 byte data Panel Reset RES LOW 10ms RES HIGH 10ms Display update sequence setting Use Waveform from Ram SPI 0x22 0xc7 Set RAMX address counter SPI 0x4e 0x00 Set RAMY address counter SPI 0x4f 0x27 0x01 Note2 Waveform Setting SPI 0...

Страница 22: ...BOL PARAMETER CONDITIO NS MIN TYPE MAX UNIT Note R Reflectance White 30 35 Note 14 1 Gn 2Grey Level DS WS DS n m 1 L CR Contrast Ratio indoor 10 Panel s life 0 50 5years or 1000000 times Note 14 2 WS White state DS Dark state m 2 Note 14 1 Luminance meter Eye One Pro Spectrophotometer Note 14 2 We guarantee display quality from 10 30 generally If operation ambient temperature from 0 50 will add ex...

Страница 23: ...ite reflectance Rd dark reflectance CR R1 Rd 14 3 Reflection Ratio The reflection ratio is expressed as R Reflectance Factor white board x L center L white board L center is the luminance measured at center in a white area R G B 1 L white board is the luminance of a standard white board Both are measured with equivalent illumination source The viewing angle shall be no more than 2 degrees ...

Страница 24: ...mmended that you attach a transparent protective plate to the surface in order to protect the EPD Transparent protective plate should have sufficient strength in order to resist external force 3 You should adopt radiation structure to satisfy the temperature specification 4 Acetic acid type and chlorine type materials for the cover case are not desirable because the former generates corrosive gas ...

Страница 25: ...ons of the specification is not implied Exposure to limiting values for extended periods may affect device reliability Application information Where application information is given it is advisory and dose not form part of the specification Product Environmental certification ROHS REMARK All The specifications listed in this document are guaranteed for module only Post assembled operation or compo...

Страница 26: ...RH For 480Hr Test in white pattern IEC 60 068 2 3CA 7 Temperature Cycle 25 30min 70 30min 50 Cycle Test in white pattern IEC 60 068 2 14NB 8 Package Vibration 1 04G Frequency 10 500Hz Full packed for shipment Direction X Y Z Duration 1hours in each direction 9 Package Drop Impact Drop from height of 122 cm on Full packed for shipment Concrete surface Drop sequence 1 corner 3edges 6face One drop fo...

Страница 27: ...www heltec cn 27 30 HTE029A1 17 Block Diagram 18 PartA PartB specification BORDER TFT AA Part Bis fulfilled area PartA BORD ER TFT AA ...

Страница 28: ...e D 0 4 Not Allow Ignore Display unwork Electric Display Not Allow Not Allow Ignore Display error Electric Display Not Allow Not Allow Ignore Scratch or line defect include dirt Visual Film card L 2 W 0 2 Ignore Ignore 2 0mm L 5 0mm 0 2 W 0 3mm N 2 Ignore L 5 W 0 3 Not Allow Ignore PS Bubble Visual Film card D 0 2mm Ignore Ignore 0 2mm D 0 35mm N 4 N 4 Ignore D 0 35 mm Not Allow Ignore Side Fragme...

Страница 29: ...www heltec cn 29 30 HTE029A1 L long W wide D pointsize ...

Страница 30: ...laced the up EPE on the top of the trays and place a chip board on it Step 5 1 Seal the box with adhensive tapes 2 Paste the lable onto the exterior box and the lable can t cover the safety transfer and RoSH sign 2017 06 22 Date 2017 06 22 Date 2017 06 22 Date Confirm Approve Design Anti static EPE the neighboring Plastic trays 2 There are 12 layers product total 20 12 240 pcs 3 An empty Plastic t...

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