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GRUNDIG Service
Chassis G1
3 - 46
A/D
CLAMP
R
AIN
8
R
OUT
A/D
CLAMP
G
AIN
8
G
OUT
A/D
CLAMP
B
AIN
8
B
OUT
ANALOG INTERFACE
SOGIN
HSYNC
FILT
VSYNC
SYNC
PROCESSING AND
CLOCK
GENERATION
MUXES
DATACK
HSOUT
VSOUT
SOGOUT
8
REF
REFBYPASS
R
OUT
8
G
OUT
8
B
OUT
DATACK
HSOUT
VSOUT
SOGOUT
DE
SCL
SERIAL REGISTER AND
POWER MANAGEMENT
SDA
A
0
DIGITAL INTERFACE
DVI
RECEIVER
HDCP
R
X0+
R
X0–
R
X1+
R
X1–
R
X2+
R
X2–
R
XC+
R
XC–
R
TERM
DDCSCL
DDCSDA
MCL
MDA
8
8
8
R
OUT
G
OUT
B
OUT
DATACK
DE
HSYNC
VSYNC
AD9882
BA6161
VREF
GOOD
5.1V
COMP
VFB
SYNC
BOOT
DRIVER
HICCUP CURRENT
LIMITING
INTERNAL
REFERENCE
SS
INH
L4973
ZERO CURRENT
INHIBIT
+
-
3.3V
V5.1
E/A
SOFT
START
5.1V
3.3V
THERMAL
SHUTDOWN
INTERNAL
SUPPLY
5.1V
-
+
PWM
CURRENT
LIMITING
R
S
Q
Q
CBOOT
CHARGE
OSCILLATOR
OUT
OUT
GND
OSC
V
CC
V
CC
17(19)
11(12)
12(13)
18(20)
1(1)
2(2)
3(3)
9(10)
8(9)
7(8)
16(18)
10(11)
4,5,6,13,14,15
(4,5,6,7,14,15,16,17)
Pin x = Powerdip
Pin (x) = S020
INHIBIT
SOFTSTART
VOLTAGES
MONITOR
THERMAL
SHUTDOWN
E/A
PWM
3.3V
OSCILLATOR
R
S
Q
INTERNAL
REFERENCE
INTERNAL
SUPPLY
3.3V
5.1V
DRIVE
CBOOT
CHARGE
CBOOT
CHARGE
AT LIGHT
LOADS
2
7
8
FB
COMP
SS_INH
L4978
3
1
4
6
5
BOOT
OSC
GND
OUT
VCC
SS
V
DD(3.3 V)
V
XTAL1
Address
16 Bit
XTAL2
RSTIN
CVBS1A
CVBS1B
CVBS2
R
G
B
COR
BLANK
HSYNC
VSYNC
RD
WR
CSROM
CSSDRAM
MEMCLK
UDQM
LDQM
CLKEN
16 Bit
Data
Port 2
8 Bit
15 Bit
Port 3
6 Bit
Port 4
6 Bit
Port 5
7 Bit
Port 6
4 Bit
JTAG
SS
V
DD(2.5 V)
V
M2
19
18
17
16
15
14
PROG.
CLAMP
1
PROG.
CLAMP
PROG.
CLAMP
PROG.
CLAMP
PROG.
CLAMP
3
5
6
PROG.
CLAMP
10
4
2
7
I
2
C
DECODER
3 STATE OUTPUTS
13
12
11
20
S CL
S DA
SUB-ADDRESS
GND
0/6
dB
0/6
dB
0/6
dB
0/6
dB
0/6
dB
0/6
dB
0/6
dB
0/6
dB
8
V
CC1
9
INPUTS
OUTPUTS
V
CC2
TEA6425
6
x
8
MATRIX
CLOCK
OSCILLATOR
5.8 V
4.8 V
SOURCE
(S)
S
R
Q
DCMAX
BYPASS
(BP)
+
-
VI
LIMIT
FAULT
PRESENT
CURRENT LIMIT
COMPARATOR
ENABLE
LEADING
EDGE
BLANKING
THERMAL
SHUTDOWN
+
-
DRAIN
(D)
REGULATOR
5.8 V
BYPASS PIN
UNDER-VOLTAGE
1.0 V + VT
ENABLE/
UNDER-
VOLTAGE
(EN/UV)
Q
240
µ
A
50
µ
A
LINE UNDER-VOLTAGE
RESET
AUTO-
RESTART
COUNTER
JITTER
1.0 V
CURRENT
LIMIT STATE
MACHINE
6.3 V
TNY264
UCC5380
UNDER
±
VOLTAGE
OVER
±
VOLTAGE
VOLT
±
SEC
LMT
SOFT
START
STOP
START
14
1
+
1 V
+
1 V
ISS
8
Q
Q
S
R
S/D
LATCH
CT
4 V
4 V
4
5 V
5 V
3
5
7
2 ISS
S/S
PWM
SYNC
MAX D/C
RAMP
CLK
OSCILL
Q
Q
S
R
PWM
LATCH
CURRENT
LIMIT
SHUT DOWN
SD
PWM DRIVE
1.375 V
10
11
9
1.0V
4V
2
ISD
10
ISD
1 V
REF
GEN
5.0 V
UVLO
17 V
6
10 / 8 V
12 V
12
13
+
VDD REG
UVS
OVS
VS
FB
SS
RT
HI
HI
LO
LO
5V
UCC3961
NTSC/PAL/
SECAM
3D Comb
Decoder/ Motion
Adaptive De-
interlacing
Main
Capture
Port with
Filters
CPU & OSD
Interface
CVBS1
CVBS1
S-Video
YPbPr
SXGA RGB
(1280x1024/60)
24 bit Digital RGB
Hsync/Vsync
I2C
8 bit Add/Data
Frame Buffer
Controller
Frame Rate
Converter
Main Picture
Display
3:2 Pull Down
Cubic4 Scaler
PIP
Display
VBI/OSD/
TELETEXT
Display
Auto Color
Adjustment
ICSC
Blender
Chroma Key
VM Control
H&V Voltage
Protection
Gamma LUT
Datapath
LCD
Overdrive
LVDS Tx
PIP/
Capture
Port with
Filters
Auto Mode/Auto
Tune/Auto Phase
TA+/TA-
TB+/TB-
TC+/TC-
TD+/TD-
TCLK+/
TCLK-
SVP EX52/51
IC-Blockschaltpläne / IC Block Circuit Diagrams
Содержание Tharus 26 LW 68-9510 Dolby
Страница 6: ...Chassis G1 GRUNDIG Service 1 6...