1 About This Guide
1.3 Terminology and Abbreviations
DBUG399-1.0E
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1.3
Terminology and Abbreviations
The terminology and abbreviations used in this manual are as shown
Table 1-1 Terminology and Abbreviations
Terminology and Abbreviations
Meaning
FPGA
Field Programmable Gate Array
SIP
System in Package
SDRAM
Synchronous Dynamic RAM
PSRAM
Pseudo static random access memory
CFU
Configurable Function Unit
CLS
Configurable Logic Slice
CRU
Configurable Routing Unit
LUT4
4-input Look-up Tables
LUT5
5-input Look-up Tables
LUT6
6-input Look-up Tables
LUT7
7-input Look-up Tables
LUT8
8-input Look-up Tables
REG
Register
ALU
Arithmetic Logic Unit
IOB
Input/Output Block
SSRAM
Shadow Static Random Access Memory
BSRAM
Block Static Random Access Memory
SP
Single Port
SDP
Semi Dual Port
DP
Dual Port
DSP
Digital Signal Processing
DQCE
Dynamic Quadrant Clock Enable
DCS
Dynamic Clock Selector
PLL
Phase-locked Loop
DLL
Delay-locked Loop
EQ144
EQFP144 package
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