20
PSD1206
- PSD1210
- SIL 3 - SIL 2 Switching Power Supply 24 Vdc
G.M. International ISM0076-7
Although a constant failure rate is assumed by the probabilistic estimation method, this only applies provided that the useful lifetime of components is not exceeded. Beyond this useful
lifetime, the result of the probabilistic calculation method is meaningless as the probability of failure significantly increases with time. The useful lifetime is highly dependent on the
component itself and its operating conditions, temperature in particular (for example, electrolyte capacitors can be very sensitive to temperature). This assumption of a constant failure
rate is based on the bathtub curve, which shows the typical behavior for electronic components. Therefore it is obvious that PFDavg calculation is only valid for components that have this
constant domain and that the validity of the calculation is limited to the useful lifetime of each component. It is assumed that early failures are detected to a huge percentage during the
installation period and therefore the assumption of a constant failure rate during the useful lifetime is valid. However, according to section 7.4.7.4 of IEC 61508-2, a useful lifetime, based
on experience, should be assumed. According to section 7.4.7.4 note 3 of the IEC 61508-2 experience has shown that the useful lifetime often lies within a range of about 10-15 years.
Impact of lifetime of critical components on Failure Rate
The equation of PFDavg, applicable when the component or sub-system is new and when
λ
du are 99 % known by proof test is:
When these tests do not detect at least 99 % of
λ
du the same equation changes to:
where: Et is the effectiveness of proof test (0-100 %), SL can be intended as:
1) Time between two proof tests with 99-100 % effectiveness;
2) Time between two replacements;
3) Component Life time if no substitution and no proof test is meant to be done.
For TI = 1 year the equation becomes:
Example 1:
λ
du = 0.01 / yr ; TI = 1 yr ; SL = 12 yrs ; Et = 90 % = 0.9 ; PFDavg = 0.0002 / yr
At installation: PFDavg = 0.01 / 2 = 0.005 / yr ; RRF = 1 / PFDavg = 1 / 0.005 = 200 (Suitable for SIL 2)
After 1 yr: PFDavg = (0.9 x 0.01/2) + (0.1 x 0.01 x 6) = 0.0105 ; RRF = 95 (Suitable for SIL 1)
Example 2:
λ
du = 0.01 / yr ; TI = 1 yr ; SL = 12 yrs ; Et = 99 % = 0.99 ; PFDavg = 0.0002 / yr
At installation: PFDavg = 0.01 / 2 = 0.005 / yr ; RRF = 1 / PFDavg = 1 / 0.005 = 200 (Suitable for SIL 2)
After 1 yr: PFDavg = (0.99 x 0.01/2) + (0.01 x 0.01 x 6) = 0.0056 ; RRF = 178 (Suitable for SIL 2)
2
TI
du
PFDavg
×
=
λ
2
)
1
(
)
2
(
SL
du
Et
TI
du
Et
PFDavg
×
×
−
+
×
×
=
λ
λ
(
)
1
2
2
du
SL
PFDavg
Et
Et
du
λ
λ
⎛
⎞
⎜
⎟
⎜
⎟
⎝
⎠
=
×
+ −
×
×
Influence of PFDavg calculation on efficiency of Proof Test for a 1oo1 architecture.
MODELS PSD1206 - PSD1210
+
+
-
-
-
+
L/+ N/-
=
_
CS
Cu
rre
nt
Sha
ring
Fault
Output 1
Supply
Input 1
48 Vdc
Output Bus
MODELS PSD1206 - PSD1210
+
+
-
-
-
+
L/+ N/-
=
_
CS
Cu
rre
nt
Sha
ring
Fault
Output 2
Supply
Input 2
SIL 3
48 Vdc Output with connection in series of power supplies
To obtain higher output voltage of 48 V, it is possible to connect two modules in series as shown below. Output voltage can be furtherly increased by connecting more units in series.
NOTE: In this configuration, Current Sharing feature is not available, therefore current sharing connection (CS) must not be used.
